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https://github.com/tiagovignatti/intel-gpu-tools.git
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tests/kms_flip: Use fixed size (2kx2k) buffers for dummy load
Make the dummy load independent of the display resolution by using a two fixed size dummy bos to generate the load. As a final step do another copy from one of the dummy bos to the fb to make sure there's a dependency between the dummy load and any subsequent operation on the fb. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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@ -190,28 +190,35 @@ static void blit_copy(drm_intel_bo *dst, drm_intel_bo *src,
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static void emit_dummy_load__bcs(struct test_output *o)
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{
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int i, limit;
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drm_intel_bo *dummy_bo, *target_bo;
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drm_intel_bo *src_bo, *dst_bo, *fb_bo;
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struct igt_fb *fb_info = &o->fb_info[o->current_fb_id];
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unsigned pitch = fb_info->stride;
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limit = intel_gen(devid) < 6 ? 500 : 5000;
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dummy_bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", fb_info->size, 4096);
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igt_assert(dummy_bo);
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target_bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd, "imported", fb_info->gem_handle);
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igt_assert(target_bo);
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src_bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", 2048*2048*4, 4096);
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igt_assert(src_bo);
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dst_bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", 2048*2048*4, 4096);
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igt_assert(dst_bo);
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fb_bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd, "imported", fb_info->gem_handle);
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igt_assert(fb_bo);
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for (i = 0; i < limit; i++) {
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blit_copy(dummy_bo, target_bo,
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o->fb_width, o->fb_height,
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pitch, pitch);
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blit_copy(dst_bo, src_bo,
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2048, 2048,
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2048*4, 2048*4);
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swap(dummy_bo, target_bo);
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swap(src_bo, dst_bo);
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}
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blit_copy(fb_bo, src_bo,
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min(o->fb_width, 2048), min(o->fb_height, 2048),
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fb_info->stride, 2048*4);
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intel_batchbuffer_flush(batch);
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drm_intel_bo_unreference(dummy_bo);
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drm_intel_bo_unreference(target_bo);
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drm_intel_bo_unreference(src_bo);
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drm_intel_bo_unreference(dst_bo);
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drm_intel_bo_unreference(fb_bo);
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}
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static void emit_fence_stress(struct test_output *o)
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@ -260,7 +267,7 @@ static void emit_dummy_load__rcs(struct test_output *o)
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{
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const struct igt_fb *fb_info = &o->fb_info[o->current_fb_id];
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igt_render_copyfunc_t copyfunc;
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struct igt_buf sb[2], *src, *dst;
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struct igt_buf sb[3], *src, *dst, *fb;
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int i, limit;
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copyfunc = igt_get_render_copyfunc(devid);
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@ -269,37 +276,51 @@ static void emit_dummy_load__rcs(struct test_output *o)
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limit = intel_gen(devid) < 6 ? 500 : 5000;
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sb[0].bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", fb_info->size, 4096);
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sb[0].bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", 2048*2048*4, 4096);
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igt_assert(sb[0].bo);
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sb[0].size = sb[0].bo->size;
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sb[0].tiling = I915_TILING_NONE;
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sb[0].data = NULL;
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sb[0].num_tiles = sb[0].bo->size;
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sb[0].stride = 4 * o->fb_width;
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sb[0].stride = 4 * 2048;
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sb[1].bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd, "imported", fb_info->gem_handle);
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sb[1].bo = drm_intel_bo_alloc(bufmgr, "dummy_bo", 2048*2048*4, 4096);
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igt_assert(sb[1].bo);
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sb[1].size = sb[1].bo->size;
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sb[1].tiling = fb_info->tiling;
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sb[1].tiling = I915_TILING_NONE;
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sb[1].data = NULL;
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sb[1].num_tiles = sb[1].bo->size;
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sb[1].stride = fb_info->stride;
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sb[1].stride = 4 * 2048;
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sb[2].bo = gem_handle_to_libdrm_bo(bufmgr, drm_fd, "imported", fb_info->gem_handle);
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igt_assert(sb[2].bo);
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sb[2].size = sb[2].bo->size;
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sb[2].tiling = fb_info->tiling;
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sb[2].data = NULL;
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sb[2].num_tiles = sb[2].bo->size;
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sb[2].stride = fb_info->stride;
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src = &sb[0];
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dst = &sb[1];
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fb = &sb[2];
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for (i = 0; i < limit; i++) {
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copyfunc(batch, NULL,
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src, 0, 0,
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o->fb_width, o->fb_height,
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2048, 2048,
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dst, 0, 0);
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swap(src, dst);
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}
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copyfunc(batch, NULL,
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src, 0, 0,
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min(o->fb_width, 2048), min(o->fb_height, 2048),
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fb, 0, 0);
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intel_batchbuffer_flush(batch);
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drm_intel_bo_unreference(sb[0].bo);
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drm_intel_bo_unreference(sb[1].bo);
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drm_intel_bo_unreference(sb[2].bo);
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}
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static void dpms_off_other_outputs(struct test_output *o)
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