mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-22 07:16:14 +00:00
rename global mmio variable to igt_global_mmio
Global variable names should reflect the fact that they are indeed global, and at the very least they should not be as short as just "mmio". Rename mmio to igt_global_mmio. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -32,7 +32,7 @@
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#include <pciaccess.h>
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#include <pciaccess.h>
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/* register access helpers from intel_mmio.c */
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/* register access helpers from intel_mmio.c */
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extern void *mmio;
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extern void *igt_global_mmio;
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void intel_mmio_use_pci_bar(struct pci_device *pci_dev);
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void intel_mmio_use_pci_bar(struct pci_device *pci_dev);
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void intel_mmio_use_dump_file(char *file);
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void intel_mmio_use_dump_file(char *file);
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@ -65,11 +65,12 @@
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#define FAKEKEY 0x2468ace0
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#define FAKEKEY 0x2468ace0
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/**
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/**
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* mmio:
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* igt_global_mmio:
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*
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*
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* Pointer to the register range. It is not recommended to use this directly.
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* Pointer to the register range, initialized using intel_register_access_init()
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* or intel_mmio_use_dump_file(). It is not recommended to use this directly.
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*/
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*/
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void *mmio;
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void *igt_global_mmio;
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static struct _mmio_data {
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static struct _mmio_data {
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int inited;
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int inited;
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@ -83,9 +84,9 @@ static struct _mmio_data {
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* intel_mmio_use_dump_file:
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* intel_mmio_use_dump_file:
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* @file: name of the register dump file to open
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* @file: name of the register dump file to open
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*
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*
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* Sets up #mmio to point at the data contained in @file. This allows the same
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* Sets up #igt_global_mmio to point at the data contained in @file. This allows
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* code to get reused for dumping and decoding from running hardware as from
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* the same code to get reused for dumping and decoding from running hardware as
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* register dumps.
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* from register dumps.
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*/
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*/
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void
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void
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intel_mmio_use_dump_file(char *file)
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intel_mmio_use_dump_file(char *file)
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@ -98,8 +99,8 @@ intel_mmio_use_dump_file(char *file)
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"Couldn't open %s\n", file);
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"Couldn't open %s\n", file);
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fstat(fd, &st);
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fstat(fd, &st);
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mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
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igt_global_mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
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igt_fail_on_f(mmio == MAP_FAILED,
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igt_fail_on_f(igt_global_mmio == MAP_FAILED,
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"Couldn't mmap %s\n", file);
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"Couldn't mmap %s\n", file);
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close(fd);
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close(fd);
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}
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}
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@ -108,9 +109,7 @@ intel_mmio_use_dump_file(char *file)
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* intel_mmio_use_pci_bar:
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* intel_mmio_use_pci_bar:
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* @pci_dev: intel gracphis pci device
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* @pci_dev: intel gracphis pci device
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*
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*
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* Sets up #mmio to point at the data contained in @file. This allows the same
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* Sets up #igt_global_mmio to point at the mmio bar.
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* code to get reused for dumping and decoding from running hardware as from
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* register dumps.
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*
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*
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* @pci_dev can be obtained from intel_get_pci_device().
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* @pci_dev can be obtained from intel_get_pci_device().
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*/
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*/
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@ -139,7 +138,7 @@ intel_mmio_use_pci_bar(struct pci_device *pci_dev)
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pci_dev->regions[mmio_bar].base_addr,
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pci_dev->regions[mmio_bar].base_addr,
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mmio_size,
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mmio_size,
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PCI_DEV_MAP_FLAG_WRITABLE,
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PCI_DEV_MAP_FLAG_WRITABLE,
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&mmio);
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&igt_global_mmio);
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igt_fail_on_f(error != 0,
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igt_fail_on_f(error != 0,
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"Couldn't map MMIO region\n");
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"Couldn't map MMIO region\n");
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@ -160,7 +159,7 @@ release_forcewake_lock(int fd)
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* handling and also allows register access to be checked with an explicit
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* handling and also allows register access to be checked with an explicit
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* whitelist.
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* whitelist.
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*
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*
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* It also initializes #mmio like intel_mmio_use_pci_bar().
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* It also initializes #igt_global_mmio like intel_mmio_use_pci_bar().
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*
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*
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* @pci_dev can be obtained from intel_get_pci_device().
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* @pci_dev can be obtained from intel_get_pci_device().
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*/
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*/
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@ -170,10 +169,10 @@ intel_register_access_init(struct pci_device *pci_dev, int safe)
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int ret;
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int ret;
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/* after old API is deprecated, remove this */
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/* after old API is deprecated, remove this */
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if (mmio == NULL)
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if (igt_global_mmio == NULL)
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intel_mmio_use_pci_bar(pci_dev);
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intel_mmio_use_pci_bar(pci_dev);
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igt_assert(mmio != NULL);
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igt_assert(igt_global_mmio != NULL);
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if (mmio_data.inited)
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if (mmio_data.inited)
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return -1;
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return -1;
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@ -266,7 +265,7 @@ intel_register_read(uint32_t reg)
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}
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}
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read_out:
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read_out:
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ret = *(volatile uint32_t *)((volatile char *)mmio + reg);
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ret = *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
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out:
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out:
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return ret;
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return ret;
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}
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}
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@ -303,7 +302,7 @@ intel_register_write(uint32_t reg, uint32_t val)
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"Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
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"Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
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write_out:
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write_out:
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*(volatile uint32_t *)((volatile char *)mmio + reg) = val;
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*(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
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}
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}
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@ -314,14 +313,14 @@ write_out:
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* 32-bit read of the register at offset @reg. This function only works when the
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* 32-bit read of the register at offset @reg. This function only works when the
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* new register access helper is initialized with intel_register_access_init().
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* new register access helper is initialized with intel_register_access_init().
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*
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*
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* This function directly accesses the #mmio without safety checks.
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* This function directly accesses the #igt_global_mmio without safety checks.
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*
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*
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* Returns:
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* Returns:
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* The value read from the register.
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* The value read from the register.
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*/
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*/
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uint32_t INREG(uint32_t reg)
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uint32_t INREG(uint32_t reg)
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{
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{
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return *(volatile uint32_t *)((volatile char *)mmio + reg);
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return *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
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}
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}
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/**
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/**
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@ -331,14 +330,14 @@ uint32_t INREG(uint32_t reg)
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* 16-bit read of the register at offset @reg. This function only works when the
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* 16-bit read of the register at offset @reg. This function only works when the
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* new register access helper is initialized with intel_register_access_init().
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* new register access helper is initialized with intel_register_access_init().
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*
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*
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* This function directly accesses the #mmio without safety checks.
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* This function directly accesses the #igt_global_mmio without safety checks.
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*
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*
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* Returns:
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* Returns:
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* The value read from the register.
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* The value read from the register.
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*/
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*/
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uint16_t INREG16(uint32_t reg)
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uint16_t INREG16(uint32_t reg)
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{
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{
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return *(volatile uint16_t *)((volatile char *)mmio + reg);
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return *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg);
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}
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}
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/**
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/**
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@ -348,14 +347,14 @@ uint16_t INREG16(uint32_t reg)
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* 8-bit read of the register at offset @reg. This function only works when the
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* 8-bit read of the register at offset @reg. This function only works when the
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* new register access helper is initialized with intel_register_access_init().
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* new register access helper is initialized with intel_register_access_init().
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*
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*
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* This function directly accesses the #mmio without safety checks.
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* This function directly accesses the #igt_global_mmio without safety checks.
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*
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*
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* Returns:
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* Returns:
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* The value read from the register.
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* The value read from the register.
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*/
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*/
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uint8_t INREG8(uint32_t reg)
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uint8_t INREG8(uint32_t reg)
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{
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{
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return *((volatile uint8_t *)mmio + reg);
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return *((volatile uint8_t *)igt_global_mmio + reg);
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}
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}
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/**
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/**
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@ -367,11 +366,11 @@ uint8_t INREG8(uint32_t reg)
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* when the new register access helper is initialized with
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* when the new register access helper is initialized with
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* intel_register_access_init().
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* intel_register_access_init().
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*
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*
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* This function directly accesses the #mmio without safety checks.
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* This function directly accesses the #igt_global_mmio without safety checks.
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*/
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*/
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void OUTREG(uint32_t reg, uint32_t val)
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void OUTREG(uint32_t reg, uint32_t val)
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{
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{
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*(volatile uint32_t *)((volatile char *)mmio + reg) = val;
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*(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
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}
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}
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/**
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/**
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@ -383,11 +382,11 @@ void OUTREG(uint32_t reg, uint32_t val)
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* when the new register access helper is initialized with
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* when the new register access helper is initialized with
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* intel_register_access_init().
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* intel_register_access_init().
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*
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*
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* This function directly accesses the #mmio without safety checks.
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* This function directly accesses the #igt_global_mmio without safety checks.
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*/
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*/
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void OUTREG16(uint32_t reg, uint16_t val)
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void OUTREG16(uint32_t reg, uint16_t val)
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{
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{
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*(volatile uint16_t *)((volatile char *)mmio + reg) = val;
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*(volatile uint16_t *)((volatile char *)igt_global_mmio + reg) = val;
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}
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}
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/**
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/**
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@ -399,9 +398,9 @@ void OUTREG16(uint32_t reg, uint16_t val)
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* when the new register access helper is initialized with
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* when the new register access helper is initialized with
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* intel_register_access_init().
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* intel_register_access_init().
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*
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*
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* This function directly accesses the #mmio without safety checks.
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* This function directly accesses the #igt_global_mmio without safety checks.
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*/
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*/
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void OUTREG8(uint32_t reg, uint8_t val)
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void OUTREG8(uint32_t reg, uint8_t val)
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{
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{
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*((volatile uint8_t *)mmio + reg) = val;
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*((volatile uint8_t *)igt_global_mmio + reg) = val;
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}
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}
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@ -491,7 +491,7 @@ static int intel_reg_snapshot(struct config *config, int argc, char *argv[])
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intel_mmio_use_pci_bar(config->pci_dev);
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intel_mmio_use_pci_bar(config->pci_dev);
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/* XXX: error handling */
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/* XXX: error handling */
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write(1, mmio, config->pci_dev->regions[mmio_bar].size);
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write(1, igt_global_mmio, config->pci_dev->regions[mmio_bar].size);
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if (config->verbosity > 0)
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if (config->verbosity > 0)
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printf("use this with --mmio=FILE --devid=0x%04X\n",
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printf("use this with --mmio=FILE --devid=0x%04X\n",
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@ -45,7 +45,7 @@ int main(int argc, char** argv)
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else
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else
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mmio_bar = 0;
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mmio_bar = 0;
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ret = write(1, mmio, pci_dev->regions[mmio_bar].size);
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ret = write(1, igt_global_mmio, pci_dev->regions[mmio_bar].size);
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assert(ret > 0);
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assert(ret > 0);
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return 0;
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return 0;
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