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https://github.com/tiagovignatti/intel-gpu-tools.git
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igt/kms_vblank: Simple accuracy test
Queue 60 event to arrive at the same vblank from different points in time and make sure it just works. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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43a1f64e72
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@ -67,6 +67,40 @@ static bool crtc0_active(int fd)
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return drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl) == 0;
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return drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl) == 0;
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}
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}
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static void accuracy(int fd)
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{
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union drm_wait_vblank vbl;
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unsigned long target;
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int n;
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memset(&vbl, 0, sizeof(vbl));
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.sequence = 1;
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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target = vbl.reply.sequence + 60;
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for (n = 0; n < 60; n++) {
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.sequence = 1;
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT;
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vbl.request.sequence = target;
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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}
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.sequence = 0;
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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igt_assert_eq(vbl.reply.sequence, target);
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for (n = 0; n < 60; n++) {
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struct drm_event_vblank ev;
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igt_assert_eq(read(fd, &ev, sizeof(ev)), sizeof(ev));
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igt_assert_eq(ev.sequence, target);
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}
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}
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static void vblank_query(int fd, bool busy)
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static void vblank_query(int fd, bool busy)
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{
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{
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union drm_wait_vblank vbl;
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union drm_wait_vblank vbl;
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@ -79,12 +113,12 @@ static void vblank_query(int fd, bool busy)
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if (busy) {
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if (busy) {
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vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT;
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vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT;
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vbl.request.sequence = 72;
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vbl.request.sequence = 72;
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do_or_die(drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl));
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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}
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}
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.sequence = 0;
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vbl.request.sequence = 0;
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do_or_die(drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl));
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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sq = vbl.reply.sequence;
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sq = vbl.reply.sequence;
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@ -92,7 +126,7 @@ static void vblank_query(int fd, bool busy)
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do {
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do {
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.sequence = 0;
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vbl.request.sequence = 0;
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do_or_die(drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl));
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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count++;
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count++;
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} while ((vbl.reply.sequence - sq) <= 60);
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} while ((vbl.reply.sequence - sq) <= 60);
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clock_gettime(CLOCK_MONOTONIC, &end);
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clock_gettime(CLOCK_MONOTONIC, &end);
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@ -116,12 +150,12 @@ static void vblank_wait(int fd, bool busy)
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if (busy) {
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if (busy) {
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vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT;
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vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT;
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vbl.request.sequence = 72;
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vbl.request.sequence = 72;
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do_or_die(drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl));
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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}
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}
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.sequence = 0;
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vbl.request.sequence = 0;
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do_or_die(drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl));
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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sq = vbl.reply.sequence;
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sq = vbl.reply.sequence;
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@ -129,7 +163,7 @@ static void vblank_wait(int fd, bool busy)
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do {
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do {
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.type = DRM_VBLANK_RELATIVE;
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vbl.request.sequence = 1;
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vbl.request.sequence = 1;
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do_or_die(drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl));
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do_ioctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl);
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count++;
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count++;
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} while ((vbl.reply.sequence - sq) <= 60);
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} while ((vbl.reply.sequence - sq) <= 60);
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clock_gettime(CLOCK_MONOTONIC, &end);
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clock_gettime(CLOCK_MONOTONIC, &end);
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@ -154,6 +188,9 @@ igt_main
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igt_require(crtc0_active(fd));
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igt_require(crtc0_active(fd));
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}
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}
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igt_subtest("accuracy")
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accuracy(fd);
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igt_subtest("query-idle")
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igt_subtest("query-idle")
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vblank_query(fd, false);
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vblank_query(fd, false);
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