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https://github.com/tiagovignatti/intel-gpu-tools.git
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igt/gem_mmap_wc: Test cpu mmap vs wc mmap coherency
Similar to the cpu mmap vs gtt mmap coherency test. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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parent
571b876544
commit
a6090c7191
54
lib/igt_gt.c
54
lib/igt_gt.c
@ -343,3 +343,57 @@ void igt_set_stop_rings(enum stop_ring_flags flags)
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"i915_ring_stop readback mismatch 0x%x vs 0x%x\n",
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flags, current);
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}
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static unsigned int clflush_size;
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int igt_setup_clflush(void)
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{
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FILE *file;
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char *line = NULL;
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size_t size = 0;
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int first_stanza = 1;
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int has_clflush = 0;
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if (clflush_size)
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return 1;
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file = fopen("/proc/cpuinfo", "r");
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if (file == NULL)
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return 0;
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while (getline(&line, &size, file) != -1) {
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if (strncmp(line, "processor", 9) == 0) {
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if (!first_stanza)
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break;
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first_stanza = 0;
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}
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if (strncmp(line, "flags", 5) == 0) {
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if (strstr(line, "clflush"))
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has_clflush = 1;
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}
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if (strncmp(line, "clflush size", 12) == 0) {
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char *colon = strchr(line, ':');
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if (colon)
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clflush_size = atoi(colon + 1);
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}
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}
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free(line);
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fclose(file);
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return has_clflush && clflush_size;
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}
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void igt_clflush_range(void *addr, int size)
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{
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char *p, *end;
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end = (char *)addr + size;
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p = (char *)((uintptr_t)addr & ~((uintptr_t)clflush_size - 1));
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asm volatile("mfence" ::: "memory");
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for (; p < end; p += clflush_size)
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asm volatile("clflush %0" : "+m" (*(volatile char *)p));
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asm volatile("mfence" ::: "memory");
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}
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@ -74,4 +74,7 @@ enum stop_ring_flags igt_to_stop_ring_flag(int ring);
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void igt_set_stop_rings(enum stop_ring_flags flags);
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enum stop_ring_flags igt_get_stop_rings(void);
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int igt_setup_clflush(void);
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void igt_clflush_range(void *addr, int size);
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#endif /* IGT_GT_H */
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@ -253,56 +253,6 @@ test_write_gtt(int fd)
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munmap(src, OBJECT_SIZE);
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}
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static unsigned int clflush_size;
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static int setup_clflush(void)
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{
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FILE *file;
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char *line = NULL;
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size_t size = 0;
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int first_stanza = 1;
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int has_clflush = 0;
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file = fopen("/proc/cpuinfo", "r");
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if (file == NULL)
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return 0;
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while (getline(&line, &size, file) != -1) {
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if (strncmp(line, "processor", 9) == 0) {
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if (!first_stanza)
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break;
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first_stanza = 0;
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}
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if (strncmp(line, "flags", 5) == 0) {
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if (strstr(line, "clflush"))
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has_clflush = 1;
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}
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if (strncmp(line, "clflush size", 12) == 0) {
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char *colon = strchr(line, ':');
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if (colon)
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clflush_size = atoi(colon + 1);
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}
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}
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free(line);
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fclose(file);
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return has_clflush && clflush_size;
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}
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static void clflush(void *addr, int size)
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{
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char *p, *end;
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end = (char *)addr + size;
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p = (char *)((uintptr_t)addr & ~((uintptr_t)clflush_size - 1));
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asm volatile("mfence" ::: "memory");
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for (; p < end; p += clflush_size)
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asm volatile("clflush %0" : "+m" (*(volatile char *)p));
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asm volatile("mfence" ::: "memory");
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}
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static void
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test_coherency(int fd)
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{
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@ -310,7 +260,7 @@ test_coherency(int fd)
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uint32_t *gtt, *cpu;
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int i;
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igt_require(setup_clflush());
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igt_require(igt_setup_clflush());
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handle = gem_create(fd, OBJECT_SIZE);
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@ -321,7 +271,7 @@ test_coherency(int fd)
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for (i = 0; i < OBJECT_SIZE / 64; i++) {
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int x = 16*i + (i%16);
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gtt[x] = i;
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clflush(&cpu[x], sizeof(cpu[x]));
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igt_clflush_range(&cpu[x], sizeof(cpu[x]));
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igt_assert_eq(cpu[x], i);
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}
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@ -217,6 +217,33 @@ test_write(int fd)
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munmap(src, OBJECT_SIZE);
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}
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static void
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test_coherency(int fd)
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{
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uint32_t handle;
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uint32_t *wc, *cpu;
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int i;
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igt_require(igt_setup_clflush());
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handle = gem_create(fd, OBJECT_SIZE);
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wc = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
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cpu = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
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gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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for (i = 0; i < OBJECT_SIZE / 64; i++) {
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int x = 16*i + (i%16);
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wc[x] = i;
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igt_clflush_range(&cpu[x], sizeof(cpu[x]));
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igt_assert_eq(cpu[x], i);
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}
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munmap(cpu, OBJECT_SIZE);
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munmap(wc, OBJECT_SIZE);
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gem_close(fd, handle);
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}
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static void
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test_write_gtt(int fd)
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{
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@ -446,6 +473,8 @@ igt_main
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test_read(fd);
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igt_subtest("write")
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test_write(fd);
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igt_subtest("coherency")
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test_coherency(fd);
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igt_subtest("write-gtt")
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test_write_gtt(fd);
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igt_subtest("read-write")
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