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intel_gtt: Harden against changes to kernel mappings of the GTT
Rather than use the common mmio segment which will be in future restricted to just the registers and so exclude the GTT portion on all architectures, explicitly mmap the GTT ourselves. Repeat this mmapping with a couple of flags until we matching the existing kernel mapping. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -45,33 +45,47 @@ int main(int argc, char **argv)
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int start, aper_size;
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int start, aper_size;
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unsigned char *gtt;
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unsigned char *gtt;
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uint32_t devid;
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uint32_t devid;
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int flag[] = {
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PCI_DEV_MAP_FLAG_WRITE_COMBINE,
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PCI_DEV_MAP_FLAG_WRITABLE,
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0
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}, f;
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pci_dev = intel_get_pci_device();
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pci_dev = intel_get_pci_device();
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devid = pci_dev->device_id;
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devid = pci_dev->device_id;
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intel_get_mmio(pci_dev);
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if (IS_GEN2(devid)) {
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if (IS_GEN2(devid)) {
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printf("Unsupported chipset for gtt dumper\n");
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printf("Unsupported chipset for gtt dumper\n");
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exit(1);
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exit(1);
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}
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}
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if (IS_G4X(devid) || IS_GEN5(devid))
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for (f = 0; flag[f] != 0; f++) {
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gtt = ((unsigned char *)mmio + MB(2));
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if (IS_GEN3(devid)) {
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else if (IS_965(devid))
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/* 915/945 chips has GTT range in bar 3 */
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gtt = ((unsigned char *)mmio + KB(512));
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if (pci_device_map_range(pci_dev,
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else {
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pci_dev->regions[3].base_addr,
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/* 915/945 chips has GTT range in bar 3 */
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pci_dev->regions[3].size,
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int err;
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flag[f],
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err = pci_device_map_range(pci_dev,
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(void **)>t) == 0)
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pci_dev->regions[3].base_addr,
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break;
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pci_dev->regions[3].size,
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} else {
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PCI_DEV_MAP_FLAG_WRITABLE,
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int offset;
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(void **)>t);
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if (IS_G4X(devid) || IS_GEN5(devid))
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if (err != 0) {
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offset = MB(2);
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fprintf(stderr, "mapping GTT bar failed\n");
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else
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exit(1);
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offset = KB(512);
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if (pci_device_map_range(pci_dev,
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pci_dev->regions[0].base_addr + offset,
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offset,
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flag[f],
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(void **)>t) == 0)
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break;
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}
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}
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}
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}
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if (flag[f] == 0) {
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printf("Failed to map gtt\n");
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exit(1);
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}
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aper_size = pci_dev->regions[2].size;
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aper_size = pci_dev->regions[2].size;
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