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assembler/bdw: Set thread switch for multiple branch instructions

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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
This commit is contained in:
Xiang, Haihao 2013-02-22 11:14:07 +08:00 committed by Ben Widawsky
parent 216163b44d
commit 9d0287c252
1 changed files with 8 additions and 2 deletions
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10
assembler/gram.y
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@ -940,7 +940,10 @@ multibranchinstruction:
memset(&$$, 0, sizeof($$)); memset(&$$, 0, sizeof($$));
set_instruction_predicate(&$$, &$1); set_instruction_predicate(&$$, &$1);
set_instruction_opcode(&$$, $2); set_instruction_opcode(&$$, $2);
GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; if (IS_GENp(8))
gen8_set_thread_control(GEN8(&$$), gen8_thread_control(GEN8(&$$)) | BRW_THREAD_SWITCH);
else
GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH;
$$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_target = $4.reloc_target;
$$.reloc.first_reloc_offset = $4.imm32; $$.reloc.first_reloc_offset = $4.imm32;
dst_null_reg.width = $3; dst_null_reg.width = $3;
@ -952,7 +955,10 @@ multibranchinstruction:
memset(&$$, 0, sizeof($$)); memset(&$$, 0, sizeof($$));
set_instruction_predicate(&$$, &$1); set_instruction_predicate(&$$, &$1);
set_instruction_opcode(&$$, $2); set_instruction_opcode(&$$, $2);
GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH; if (IS_GENp(8))
gen8_set_thread_control(GEN8(&$$), gen8_thread_control(GEN8(&$$)) | BRW_THREAD_SWITCH);
else
GEN(&$$)->header.thread_control |= BRW_THREAD_SWITCH;
$$.reloc.first_reloc_target = $4.reloc_target; $$.reloc.first_reloc_target = $4.reloc_target;
$$.reloc.first_reloc_offset = $4.imm32; $$.reloc.first_reloc_offset = $4.imm32;
$$.reloc.second_reloc_target = $5.reloc_target; $$.reloc.second_reloc_target = $5.reloc_target;