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Code Issues Releases Wiki Activity

Prepare for 64bit relocation addresses

Browse Source 
This reveal that quite a few locations were writing relocation offsets
but only allowing for 32 bit addresses. To reveal such places in active
tests, we also now double check that we do not use more batch space than
declared.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2014-08-29 15:19:57 +01:00
parent 86055df968
commit 982f7eb238
34 changed files with 47 additions and 109 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
benchmarks/intel_upload_blit_large.c
View File

@ -104,11 +104,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(width * 4); /* src pitch */
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

2
benchmarks/intel_upload_blit_large_gtt.c
View File

@ -102,11 +102,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(width * 4); /* src pitch */
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

2
benchmarks/intel_upload_blit_large_map.c
View File

@ -105,11 +105,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(width * 4); /* src pitch */
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

2
benchmarks/intel_upload_blit_small.c
View File

@ -115,11 +115,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((height << 16) | width); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(width * 4); /* src pitch */
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

30
lib/intel_batchbuffer.c
View File

@ -240,10 +240,11 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
*/
void
intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
drm_intel_bo *buffer, uint32_t delta,
drm_intel_bo *buffer, uint64_t delta,
uint32_t read_domains, uint32_t write_domain,
int fenced)
{
uint64_t offset;
int ret;
if (batch->ptr - batch->buffer > BATCH_SZ)
@ -259,7 +260,12 @@ intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
ret = drm_intel_bo_emit_reloc(batch->bo, batch->ptr - batch->buffer,
buffer, delta,
read_domains, write_domain);
intel_batchbuffer_emit_dword(batch, buffer->offset + delta);
offset = buffer->offset64;
offset += delta;
intel_batchbuffer_emit_dword(batch, offset);
if (batch->gen >= 8)
intel_batchbuffer_emit_dword(batch, offset >> 32);
igt_assert(ret == 0);
}
@ -362,14 +368,26 @@ intel_blt_copy(struct intel_batchbuffer *batch,
dst_pitch);
OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */
OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */
OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
#define CMD_POLY_STIPPLE_OFFSET 0x7906
if (gen == 5) {
OUT_BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
OUT_BATCH(0);
}
if (gen >= 6 && src_bo == dst_bo) {
BEGIN_BATCH(3);
OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
}
intel_batchbuffer_flush(batch);
}

20
lib/intel_batchbuffer.h
View File

@ -17,7 +17,7 @@ struct intel_batchbuffer {
drm_intel_bo *bo;
uint8_t buffer[BATCH_SZ];
uint8_t *ptr;
uint8_t *ptr, *end;
uint8_t *state;
};
@ -39,7 +39,7 @@ void intel_batchbuffer_data(struct intel_batchbuffer *batch,
void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
drm_intel_bo *buffer,
uint32_t delta,
uint64_t delta,
uint32_t read_domains,
uint32_t write_domain,
int fenced);
@ -85,7 +85,9 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
* scope.
*/
#define BEGIN_BATCH(n) do { \
igt_assert(batch->end == NULL); \
intel_batchbuffer_require_space(batch, (n)*4); \
batch->end = batch->ptr + (n) * 4; \
} while (0)
/**
@ -144,6 +146,8 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
* scope.
*/
#define ADVANCE_BATCH() do { \
igt_assert(batch->ptr == batch->end); \
batch->end = NULL; \
} while(0)
#define BLIT_COPY_BATCH_START(devid, flags) do { \
@ -177,18 +181,6 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
} \
} while(0)
/**
* BLIT_RELOC_UDW:
* @devid: pci device id of the drm device
*
* Emits the upper relocation DWORD on gen8+ and nothing on earlier generations.
*/
#define BLIT_RELOC_UDW(devid) do { \
if (intel_gen(devid) >= 8) { \
OUT_BATCH(0); \
} \
} while(0)
void
intel_blt_copy(struct intel_batchbuffer *batch,
drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,

3
lib/media_fill_gen8.c
View File

@ -205,12 +205,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
/* surface */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* dynamic */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* indirect */
OUT_BATCH(0);
@ -218,7 +216,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
/* instruction */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* general state buffer size */
OUT_BATCH(0xfffff000 | 1);

3
lib/media_fill_gen8lp.c
View File

@ -205,12 +205,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
/* surface */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* dynamic */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* indirect */
OUT_BATCH(0);
@ -218,7 +216,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
/* instruction */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* general state buffer size */
OUT_BATCH(0xfffff000 | 1);

3
lib/rendercopy_gen8.c
View File

@ -522,12 +522,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
/* surface */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* dynamic */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* indirect */
OUT_BATCH(0);
@ -535,7 +533,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
/* instruction */
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
OUT_BATCH(0);
/* general state buffer size */
OUT_BATCH(0xfffff000 | 1);

2
tests/Makefile.sources
View File

@ -236,7 +236,7 @@ testdisplay_SOURCES = \
testdisplay_hotplug.c \
$(NULL)
TESTS_progs += testdisplay
#TESTS_progs += testdisplay
common_files = \
eviction_common.c \

3
tests/drm_vma_limiter_cached.c
View File

@ -88,11 +88,9 @@ igt_simple_main
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1024 << 16) | 512);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
OUT_BATCH(4096);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
ADVANCE_BATCH();
}
@ -118,7 +116,6 @@ igt_simple_main
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1 << 16) | 1);
OUT_RELOC(bo[j], I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(intel_get_drm_devid(fd));
OUT_BATCH(0xffffffff); /* color */
ADVANCE_BATCH();
}

4
tests/gem_bad_blit.c
View File

@ -85,11 +85,9 @@ bad_blit(drm_intel_bo *src_bo, uint32_t devid)
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
OUT_BATCH(BAD_GTT_DEST);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

2
tests/gem_caching.c
View File

@ -70,11 +70,9 @@ copy_bo(drm_intel_bo *src, drm_intel_bo *dst)
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((BO_SIZE/4096) << 16 | 1024);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(4096);
OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

6
tests/gem_cs_prefetch.c
View File

@ -140,12 +140,10 @@ igt_simple_main
4096);
OUT_BATCH(0); /* dst y1,x1 */
OUT_BATCH((1 << 16) | 1024);
OUT_RELOC(batch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(batch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((0 << 16) | 0); /* src x1, y1 */
OUT_BATCH(4096);
OUT_RELOC(sample_batch_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(sample_batch_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

2
tests/gem_double_irq_loop.c
View File

@ -69,11 +69,9 @@ dummy_reloc_loop(void)
OUT_BATCH(2048 << 16 | 0);
OUT_BATCH((4096) << 16 | (2048));
OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(4*4096);
OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

2
tests/gem_fenced_exec_thrash.c
View File

@ -92,11 +92,9 @@ static void emit_dummy_load(void)
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {

2
tests/gem_hangcheck_forcewake.c
View File

@ -97,11 +97,9 @@ igt_simple_main
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {

2
tests/gem_partial_pwrite_pread.c
View File

@ -70,11 +70,9 @@ copy_bo(drm_intel_bo *src, drm_intel_bo *dst)
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((BO_SIZE/4096) << 16 | 1024);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(4096);
OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

2
tests/gem_persistent_relocs.c
View File

@ -132,11 +132,9 @@ static void emit_dummy_load(int pitch)
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (intel_gen(devid) >= 6) {

6
tests/gem_pipe_control_store_loop.c
View File

@ -87,10 +87,9 @@ store_pipe_control_loop(bool preuse_buffer)
* different domain than what the pipe control write
* (and kernel wa) uses!
*/
OUT_RELOC(target_bo,
OUT_RELOC_FENCED(target_bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0xdeadbeef);
ADVANCE_BATCH();
@ -104,10 +103,9 @@ store_pipe_control_loop(bool preuse_buffer)
BEGIN_BATCH(5);
OUT_BATCH(GFX_OP_PIPE_CONTROL + 1);
OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE);
OUT_RELOC(target_bo,
OUT_RELOC_FENCED(target_bo,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
PIPE_CONTROL_GLOBAL_GTT);
BLIT_RELOC_UDW(devid);
OUT_BATCH(val); /* write data */
ADVANCE_BATCH();

2
tests/gem_reloc_vs_gpu.c
View File

@ -124,11 +124,9 @@ static void emit_dummy_load(int pitch)
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (intel_gen(devid) >= 6) {

6
tests/gem_ringfill.c
View File

@ -184,12 +184,10 @@ static void blt_copy(struct intel_batchbuffer *batch,
dst->stride);
OUT_BATCH((dst_y << 16) | dst_x); /* dst x1,y1 */
OUT_BATCH(((dst_y + h) << 16) | (dst_x + w)); /* dst x2,y2 */
OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((src_y << 16) | src_x); /* src x1,y1 */
OUT_BATCH(src->stride);
OUT_RELOC(src->bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(src->bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

6
tests/gem_set_tiling_vs_blt.c
View File

@ -93,11 +93,9 @@ static void do_test(uint32_t tiling, unsigned stride,
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(2*1024*4);
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
@ -166,11 +164,9 @@ static void do_test(uint32_t tiling, unsigned stride,
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((TEST_HEIGHT(stride)) << 16 | (TEST_WIDTH(stride)));
OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(blt_stride);
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
@ -192,11 +188,9 @@ static void do_test(uint32_t tiling, unsigned stride,
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((1) << 16 | (1));
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(stride_after);
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

1
tests/gem_storedw_loop_blt.c
View File

@ -64,7 +64,6 @@ emit_store_dword_imm(int devid, drm_intel_bo *dest, uint32_t val)
OUT_BATCH(cmd);
OUT_RELOC(dest, I915_GEM_DOMAIN_INSTRUCTION,
I915_GEM_DOMAIN_INSTRUCTION, 0);
OUT_BATCH(0);
OUT_BATCH(val);
ADVANCE_BATCH();
} else {

1
tests/gem_storedw_loop_vebox.c
View File

@ -68,7 +68,6 @@ store_dword_loop(int divider)
OUT_BATCH(0); /* reserved */
OUT_RELOC(target_buffer, I915_GEM_DOMAIN_INSTRUCTION,
I915_GEM_DOMAIN_INSTRUCTION, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH(val);
ADVANCE_BATCH();

2
tests/gem_stress.c
View File

@ -170,11 +170,9 @@ static void emit_blt(drm_intel_bo *src_bo, uint32_t src_tiling, unsigned src_pit
OUT_BATCH(dst_y << 16 | dst_x);
OUT_BATCH((dst_y+h) << 16 | (dst_x+w));
OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(src_y << 16 | src_x);
OUT_BATCH(src_pitch);
OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {

2
tests/gem_tiled_partial_pwrite_pread.c
View File

@ -91,11 +91,9 @@ copy_bo(drm_intel_bo *src, int src_tiled,
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(BO_SIZE/scratch_pitch << 16 | 1024);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(src_pitch);
OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

6
tests/gem_unfence_active_buffers.c
View File

@ -93,11 +93,9 @@ igt_simple_main
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(2*1024*4);
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
@ -128,11 +126,9 @@ igt_simple_main
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((1) << 16 | (1));
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(TEST_STRIDE);
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
igt_info("test bo offset: %#lx\n", test_bo->offset);
@ -149,11 +145,9 @@ igt_simple_main
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((1) << 16 | (1));
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(2*1024*4);
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {

6
tests/gem_unref_active_buffers.c
View File

@ -80,12 +80,10 @@ igt_simple_main
4096);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1024 << 16) | 512);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
OUT_BATCH(4096);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);

4
tests/gem_wait_render_timeout.c
View File

@ -120,9 +120,7 @@ static void blt_color_fill(struct intel_batchbuffer *batch,
OUT_BATCH(0);
OUT_BATCH(width << 16 |
height);
OUT_RELOC(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
if (intel_gen(batch->devid) >= 8)
OUT_BATCH(0);
OUT_RELOC_FENCED(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(rand()); /* random pattern */
ADVANCE_BATCH();
}

9
tests/gem_write_read_ring_switch.c
View File

@ -86,12 +86,10 @@ static void run_test(int ring)
4096);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1024 << 16) | 512);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
OUT_BATCH(4096);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
}
@ -101,8 +99,7 @@ static void run_test(int ring)
128);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1 << 16) | 1);
OUT_RELOC(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(COLOR);
ADVANCE_BATCH();

3
tests/kms_fbc_crc.c
View File

@ -97,8 +97,7 @@ static void fill_blt(data_t *data, uint32_t handle, unsigned char color)
OUT_BATCH((0 << 24) | (0xf0 << 16) | 0);
OUT_BATCH(0);
OUT_BATCH(1 << 16 | 4);
OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(color);
ADVANCE_BATCH();

2
tests/kms_flip.c
View File

@ -186,11 +186,9 @@ static void emit_dummy_load__bcs(struct test_output *o)
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(o->fb_height << 16 | o->fb_width);
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {

6
tests/kms_mmio_vs_cs_flip.c
View File

@ -87,12 +87,10 @@ static void exec_blt(data_t *data)
pitch);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(h << 16 | w);
OUT_RELOC(data->busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(data->devid);
OUT_RELOC_FENCED(data->busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC(data->busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(data->devid);
OUT_RELOC_FENCED(data->busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
}