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Code Issues Releases Wiki Activity

Prepare for 64bit relocation addresses

Browse Source 
This reveal that quite a few locations were writing relocation offsets
but only allowing for 32 bit addresses. To reveal such places in active
tests, we also now double check that we do not use more batch space than
declared.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
2014-08-29 15:19:57 +01:00
parent 86055df968
commit 982f7eb238
34 changed files with 47 additions and 109 deletions
Download Patch File Download Diff File Expand all files Collapse all files
tests/Makefile.sources
+1 -1
View File
@@ -236,7 +236,7 @@ testdisplay_SOURCES = \
testdisplay_hotplug.c \
$(NULL)
TESTS_progs += testdisplay
#TESTS_progs += testdisplay
common_files = \
eviction_common.c \
tests/drm_vma_limiter_cached.c
-3
View File
@@ -88,11 +88,9 @@ igt_simple_main
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1024 << 16) | 512);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
OUT_BATCH(4096);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
ADVANCE_BATCH();
}
@@ -118,7 +116,6 @@ igt_simple_main
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1 << 16) | 1);
OUT_RELOC(bo[j], I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(intel_get_drm_devid(fd));
OUT_BATCH(0xffffffff); /* color */
ADVANCE_BATCH();
}
tests/gem_bad_blit.c
+1 -3
View File
@@ -85,11 +85,9 @@ bad_blit(drm_intel_bo *src_bo, uint32_t devid)
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
OUT_BATCH(BAD_GTT_DEST);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_caching.c
-2
View File
@@ -70,11 +70,9 @@ copy_bo(drm_intel_bo *src, drm_intel_bo *dst)
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((BO_SIZE/4096) << 16 | 1024);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(4096);
OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_cs_prefetch.c
+2 -4
View File
@@ -140,12 +140,10 @@ igt_simple_main
4096);
OUT_BATCH(0); /* dst y1,x1 */
OUT_BATCH((1 << 16) | 1024);
OUT_RELOC(batch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(batch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((0 << 16) | 0); /* src x1, y1 */
OUT_BATCH(4096);
OUT_RELOC(sample_batch_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(sample_batch_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_double_irq_loop.c
-2
View File
@@ -69,11 +69,9 @@ dummy_reloc_loop(void)
OUT_BATCH(2048 << 16 | 0);
OUT_BATCH((4096) << 16 | (2048));
OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(4*4096);
OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_fenced_exec_thrash.c
-2
View File
@@ -92,11 +92,9 @@ static void emit_dummy_load(void)
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
tests/gem_hangcheck_forcewake.c
-2
View File
@@ -97,11 +97,9 @@ igt_simple_main
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
tests/gem_partial_pwrite_pread.c
-2
View File
@@ -70,11 +70,9 @@ copy_bo(drm_intel_bo *src, drm_intel_bo *dst)
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((BO_SIZE/4096) << 16 | 1024);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(4096);
OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_persistent_relocs.c
-2
View File
@@ -132,11 +132,9 @@ static void emit_dummy_load(int pitch)
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (intel_gen(devid) >= 6) {
tests/gem_pipe_control_store_loop.c
+2 -4
View File
@@ -87,10 +87,9 @@ store_pipe_control_loop(bool preuse_buffer)
* different domain than what the pipe control write
* (and kernel wa) uses!
*/
OUT_RELOC(target_bo,
OUT_RELOC_FENCED(target_bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0xdeadbeef);
ADVANCE_BATCH();
@@ -104,10 +103,9 @@ store_pipe_control_loop(bool preuse_buffer)
BEGIN_BATCH(5);
OUT_BATCH(GFX_OP_PIPE_CONTROL + 1);
OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE);
OUT_RELOC(target_bo,
OUT_RELOC_FENCED(target_bo,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
PIPE_CONTROL_GLOBAL_GTT);
BLIT_RELOC_UDW(devid);
OUT_BATCH(val); /* write data */
ADVANCE_BATCH();
tests/gem_reloc_vs_gpu.c
-2
View File
@@ -124,11 +124,9 @@ static void emit_dummy_load(int pitch)
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (intel_gen(devid) >= 6) {
tests/gem_ringfill.c
+2 -4
View File
@@ -184,12 +184,10 @@ static void blt_copy(struct intel_batchbuffer *batch,
dst->stride);
OUT_BATCH((dst_y << 16) | dst_x); /* dst x1,y1 */
OUT_BATCH(((dst_y + h) << 16) | (dst_x + w)); /* dst x2,y2 */
OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((src_y << 16) | src_x); /* src x1,y1 */
OUT_BATCH(src->stride);
OUT_RELOC(src->bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(src->bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_set_tiling_vs_blt.c
-6
View File
@@ -93,11 +93,9 @@ static void do_test(uint32_t tiling, unsigned stride,
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(2*1024*4);
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
@@ -166,11 +164,9 @@ static void do_test(uint32_t tiling, unsigned stride,
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((TEST_HEIGHT(stride)) << 16 | (TEST_WIDTH(stride)));
OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(blt_stride);
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
@@ -192,11 +188,9 @@ static void do_test(uint32_t tiling, unsigned stride,
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((1) << 16 | (1));
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(stride_after);
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_storedw_loop_blt.c
-1
View File
@@ -64,7 +64,6 @@ emit_store_dword_imm(int devid, drm_intel_bo *dest, uint32_t val)
OUT_BATCH(cmd);
OUT_RELOC(dest, I915_GEM_DOMAIN_INSTRUCTION,
I915_GEM_DOMAIN_INSTRUCTION, 0);
OUT_BATCH(0);
OUT_BATCH(val);
ADVANCE_BATCH();
} else {
tests/gem_storedw_loop_vebox.c
-1
View File
@@ -68,7 +68,6 @@ store_dword_loop(int divider)
OUT_BATCH(0); /* reserved */
OUT_RELOC(target_buffer, I915_GEM_DOMAIN_INSTRUCTION,
I915_GEM_DOMAIN_INSTRUCTION, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_BATCH(val);
ADVANCE_BATCH();
tests/gem_stress.c
-2
View File
@@ -170,11 +170,9 @@ static void emit_blt(drm_intel_bo *src_bo, uint32_t src_tiling, unsigned src_pit
OUT_BATCH(dst_y << 16 | dst_x);
OUT_BATCH((dst_y+h) << 16 | (dst_x+w));
OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(src_y << 16 | src_x);
OUT_BATCH(src_pitch);
OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
tests/gem_tiled_partial_pwrite_pread.c
-2
View File
@@ -91,11 +91,9 @@ copy_bo(drm_intel_bo *src, int src_tiled,
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(BO_SIZE/scratch_pitch << 16 | 1024);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(src_pitch);
OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_unfence_active_buffers.c
-6
View File
@@ -93,11 +93,9 @@ igt_simple_main
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((2048) << 16 | (2048));
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(2*1024*4);
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
@@ -128,11 +126,9 @@ igt_simple_main
OUT_BATCH(0 << 16 | 0);
OUT_BATCH((1) << 16 | (1));
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(TEST_STRIDE);
OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
igt_info("test bo offset: %#lx\n", test_bo->offset);
@@ -149,11 +145,9 @@ igt_simple_main
OUT_BATCH(0 << 16 | 1024);
OUT_BATCH((1) << 16 | (1));
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(2*1024*4);
OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
tests/gem_unref_active_buffers.c
+2 -4
View File
@@ -80,12 +80,10 @@ igt_simple_main
4096);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1024 << 16) | 512);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
OUT_BATCH(4096);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
intel_batchbuffer_flush(batch);
tests/gem_wait_render_timeout.c
+1 -3
View File
@@ -120,9 +120,7 @@ static void blt_color_fill(struct intel_batchbuffer *batch,
OUT_BATCH(0);
OUT_BATCH(width << 16 |
height);
OUT_RELOC(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
if (intel_gen(batch->devid) >= 8)
OUT_BATCH(0);
OUT_RELOC_FENCED(buf, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(rand()); /* random pattern */
ADVANCE_BATCH();
}
tests/gem_write_read_ring_switch.c
+3 -6
View File
@@ -86,12 +86,10 @@ static void run_test(int ring)
4096);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1024 << 16) | 512);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH((0 << 16) | 512); /* src x1, y1 */
OUT_BATCH(4096);
OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
}
@@ -101,8 +99,7 @@ static void run_test(int ring)
128);
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((1 << 16) | 1);
OUT_RELOC(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(COLOR);
ADVANCE_BATCH();
tests/kms_fbc_crc.c
+1 -2
View File
@@ -97,8 +97,7 @@ static void fill_blt(data_t *data, uint32_t handle, unsigned char color)
OUT_BATCH((0 << 24) | (0xf0 << 16) | 0);
OUT_BATCH(0);
OUT_BATCH(1 << 16 | 4);
OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(batch->devid);
OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(color);
ADVANCE_BATCH();
tests/kms_flip.c
-2
View File
@@ -186,11 +186,9 @@ static void emit_dummy_load__bcs(struct test_output *o)
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(o->fb_height << 16 | o->fb_width);
OUT_RELOC_FENCED(dummy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(devid);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC_FENCED(target_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(devid);
ADVANCE_BATCH();
if (IS_GEN6(devid) || IS_GEN7(devid)) {
tests/kms_mmio_vs_cs_flip.c
+2 -4
View File
@@ -87,12 +87,10 @@ static void exec_blt(data_t *data)
pitch);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(h << 16 | w);
OUT_RELOC(data->busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
BLIT_RELOC_UDW(data->devid);
OUT_RELOC_FENCED(data->busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(0 << 16 | 0);
OUT_BATCH(pitch);
OUT_RELOC(data->busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
BLIT_RELOC_UDW(data->devid);
OUT_RELOC_FENCED(data->busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
ADVANCE_BATCH();
}