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assembler/skl: update the extdesc field for SEND instruction
The send instruction on gen9 uses the 32bit immediate instead of 6bit immediate for the extended message descriptors. And some bits of SEND instruction are defined as the extdesc field. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
committed by
Damien Lespiau
parent
d6ff0b3f1f
commit
8dc95202c8
+14
-2
@@ -1190,7 +1190,11 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget
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YYERROR;
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}
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if (IS_GENp(8)) {
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if (IS_GENp(9)) {
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gen8_set_src1_reg_file(GEN8(&$$), BRW_IMMEDIATE_VALUE);
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gen8_set_src1_reg_type(GEN8(&$$), BRW_REGISTER_TYPE_D);
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gen9_set_send_extdesc(GEN8(&$$), 0);
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} else if (IS_GENp(8)) {
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gen8_set_src1_reg_file(GEN8(&$$), BRW_IMMEDIATE_VALUE);
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gen8_set_src1_reg_type(GEN8(&$$), BRW_REGISTER_TYPE_D);
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} else {
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@@ -1308,7 +1312,11 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget
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set_instruction_src0(&$$, &src0, NULL);
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set_instruction_src1(&$$, &$7, NULL);
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if (IS_GENp(8)) {
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if (IS_GENp(9)) {
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gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK);
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gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK));
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gen9_set_send_extdesc(GEN8(&$$), $6 & EX_DESC_FUNC_MASK);
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} else if (IS_GENp(8)) {
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gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK);
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gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK));
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} else {
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@@ -1358,6 +1366,10 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget
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if (IS_GENp(8)) {
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gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK);
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gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK));
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gen9_set_send_extdesc(GEN8(&$$), $6 & EX_DESC_FUNC_MASK);
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} else if (IS_GENp(8)) {
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gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK);
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gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK));
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} else {
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GEN(&$$)->header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */
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GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK);
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