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https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-14 03:16:21 +00:00
Let ip_dst and ip_src become local const variable, so as to reduce replicated code.
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45ab3cf5a1
commit
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@ -50,6 +50,26 @@ static struct dst_operand dst_null_reg =
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.reg_file = BRW_ARCHITECTURE_REGISTER_FILE,
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.reg_file = BRW_ARCHITECTURE_REGISTER_FILE,
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.reg_nr = BRW_ARF_NULL,
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.reg_nr = BRW_ARF_NULL,
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};
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};
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static struct dst_operand ip_dst =
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{
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.reg_file = BRW_ARCHITECTURE_REGISTER_FILE,
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.reg_nr = BRW_ARF_IP,
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.reg_type = BRW_REGISTER_TYPE_UD,
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.address_mode = BRW_ADDRESS_DIRECT,
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.horiz_stride = 1,
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.writemask = 0xF,
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};
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static struct src_operand ip_src =
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{
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.reg_file = BRW_ARCHITECTURE_REGISTER_FILE,
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.reg_nr = BRW_ARF_IP,
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.reg_type = BRW_REGISTER_TYPE_UD,
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.address_mode = BRW_ADDRESS_DIRECT,
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.swizzle_x = BRW_CHANNEL_X,
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.swizzle_y = BRW_CHANNEL_Y,
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.swizzle_z = BRW_CHANNEL_Z,
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.swizzle_w = BRW_CHANNEL_W,
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};
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static int get_type_size(GLuint type);
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static int get_type_size(GLuint type);
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int set_instruction_dest(struct brw_instruction *instr,
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int set_instruction_dest(struct brw_instruction *instr,
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@ -431,14 +451,6 @@ ifelseinstruction: ENDIF
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{
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{
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// for Gen4, Gen5
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// for Gen4, Gen5
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if(gen_level <= 5) {
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if(gen_level <= 5) {
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struct direct_reg dst;
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struct dst_operand ip_dst;
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struct src_operand ip_src;
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dst.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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dst.reg_nr = BRW_ARF_IP;
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dst.subreg_nr = 0;
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/* Set the istack pop count, which must always be 1. */
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/* Set the istack pop count, which must always be 1. */
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$3.imm32 |= (1 << 16);
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$3.imm32 |= (1 << 16);
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@ -446,9 +458,7 @@ ifelseinstruction: ENDIF
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$$.header.opcode = $1;
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$$.header.opcode = $1;
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$$.header.execution_size = $2;
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$$.header.execution_size = $2;
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$$.header.thread_control |= BRW_THREAD_SWITCH;
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$$.header.thread_control |= BRW_THREAD_SWITCH;
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set_direct_dst_operand(&ip_dst, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_dest(&$$, &ip_dst);
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set_instruction_dest(&$$, &ip_dst);
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src1(&$$, &$3);
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set_instruction_src1(&$$, &$3);
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$$.first_reloc_target = $3.reloc_target;
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$$.first_reloc_target = $3.reloc_target;
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@ -467,27 +477,17 @@ ifelseinstruction: ENDIF
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| predicate IF execsize relativelocation
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| predicate IF execsize relativelocation
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{
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{
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/* for Gen4 */
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/* for Gen4 */
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struct direct_reg dst;
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struct dst_operand ip_dst;
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struct src_operand ip_src;
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/* The branch instructions require that the IP register
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/* The branch instructions require that the IP register
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* be the destination and first source operand, while the
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* be the destination and first source operand, while the
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* offset is the second source operand. The offset is added
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* offset is the second source operand. The offset is added
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* to the pre-incremented IP.
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* to the pre-incremented IP.
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*/
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*/
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dst.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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dst.reg_nr = BRW_ARF_IP;
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dst.subreg_nr = 0;
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memset(&$$, 0, sizeof($$));
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memset(&$$, 0, sizeof($$));
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$$.header.opcode = $2;
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$$.header.opcode = $2;
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$$.header.execution_size = $3;
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$$.header.execution_size = $3;
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$$.header.thread_control |= BRW_THREAD_SWITCH;
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$$.header.thread_control |= BRW_THREAD_SWITCH;
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set_instruction_predicate(&$$, &$1);
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set_instruction_predicate(&$$, &$1);
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set_direct_dst_operand(&ip_dst, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_dest(&$$, &ip_dst);
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set_instruction_dest(&$$, &ip_dst);
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src1(&$$, &$4);
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set_instruction_src1(&$$, &$4);
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$$.first_reloc_target = $4.reloc_target;
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$$.first_reloc_target = $4.reloc_target;
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@ -510,22 +510,12 @@ ifelseinstruction: ENDIF
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loopinstruction: predicate WHILE execsize relativelocation instoptions
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loopinstruction: predicate WHILE execsize relativelocation instoptions
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{
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{
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if(gen_level <= 5) {
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if(gen_level <= 5) {
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struct direct_reg dst;
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struct dst_operand ip_dst;
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struct src_operand ip_src;
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/* The branch instructions require that the IP register
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/* The branch instructions require that the IP register
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* be the destination and first source operand, while the
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* be the destination and first source operand, while the
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* offset is the second source operand. The offset is added
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* offset is the second source operand. The offset is added
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* to the pre-incremented IP.
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* to the pre-incremented IP.
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*/
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*/
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dst.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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dst.reg_nr = BRW_ARF_IP;
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dst.subreg_nr = 0;
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set_direct_dst_operand(&ip_dst, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_dest(&$$, &ip_dst);
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set_instruction_dest(&$$, &ip_dst);
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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memset(&$$, 0, sizeof($$));
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memset(&$$, 0, sizeof($$));
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set_instruction_predicate(&$$, &$1);
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set_instruction_predicate(&$$, &$1);
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$$.header.opcode = $2;
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$$.header.opcode = $2;
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@ -1053,28 +1043,18 @@ sndopr: exp %prec SNDOPR
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jumpinstruction: predicate JMPI execsize relativelocation2
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jumpinstruction: predicate JMPI execsize relativelocation2
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{
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{
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struct direct_reg dst;
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struct dst_operand ip_dst;
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struct src_operand ip_src;
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/* The jump instruction requires that the IP register
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/* The jump instruction requires that the IP register
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* be the destination and first source operand, while the
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* be the destination and first source operand, while the
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* offset is the second source operand. The next instruction
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* offset is the second source operand. The next instruction
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* is the post-incremented IP plus the offset.
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* is the post-incremented IP plus the offset.
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*/
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*/
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dst.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
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dst.reg_nr = BRW_ARF_IP;
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dst.subreg_nr = 0;
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memset(&$$, 0, sizeof($$));
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memset(&$$, 0, sizeof($$));
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$$.header.opcode = $2;
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$$.header.opcode = $2;
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$$.header.execution_size = ffs(1) - 1;
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$$.header.execution_size = ffs(1) - 1;
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if(advanced_flag)
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if(advanced_flag)
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$$.header.mask_control = BRW_MASK_DISABLE;
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$$.header.mask_control = BRW_MASK_DISABLE;
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set_direct_dst_operand(&ip_dst, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_predicate(&$$, &$1);
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set_instruction_predicate(&$$, &$1);
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set_instruction_dest(&$$, &ip_dst);
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set_instruction_dest(&$$, &ip_dst);
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set_direct_src_operand(&ip_src, &dst, BRW_REGISTER_TYPE_UD);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src0(&$$, &ip_src);
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set_instruction_src1(&$$, &$4);
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set_instruction_src1(&$$, &$4);
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$$.first_reloc_target = $4.reloc_target;
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$$.first_reloc_target = $4.reloc_target;
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