assembler: Don't change the size of opcodes!

Until now, the assembler had relocation-related fields added to struct
brw_instruction. This changes the size of the structure and break code
assuming the opcode structure is really 16 bytes, for instance the
emission code in brw_eu_emit.c.

With this commit, we build on the infrastructure that slowly emerged in
the few previous commits to add a relocatable instruction with the
needed fields.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau
2013-01-21 21:41:36 +00:00
parent a45a47183a
commit 79c62f1134
4 changed files with 134 additions and 98 deletions
+13
View File
@@ -137,6 +137,7 @@ typedef struct {
enum assembler_instruction_type {
GEN4ASM_INSTRUCTION_GEN,
GEN4ASM_INSTRUCTION_GEN_RELOCATABLE,
GEN4ASM_INSTRUCTION_LABEL,
};
@@ -144,6 +145,12 @@ struct label_instruction {
char *name;
};
struct relocatable_instruction {
struct brw_instruction gen;
char *first_reloc_target, *second_reloc_target; // JIP and UIP respectively
GLint first_reloc_offset, second_reloc_offset; // in number of instructions
};
/**
* This structure is just the list container for instructions accumulated by
* the parser and labels.
@@ -153,6 +160,7 @@ struct brw_program_instruction {
unsigned inst_offset;
union {
struct brw_instruction gen;
struct relocatable_instruction reloc;
struct label_instruction label;
} instruction;
struct brw_program_instruction *next;
@@ -169,6 +177,11 @@ static inline char *label_name(struct brw_program_instruction *i)
return i->instruction.label.name;
}
static inline bool is_relocatable(struct brw_program_instruction *intruction)
{
return intruction->type == GEN4ASM_INSTRUCTION_GEN_RELOCATABLE;
}
/**
* This structure is a list of instructions. It is the final output of the
* parser.