mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-07-03 04:36:17 +00:00
rendercopy/skl: Fix the STATE_BASE_ADDRESS instruction length
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
parent
77a9ed7da2
commit
7628268952
@ -511,8 +511,8 @@ gen7_emit_push_constants(struct intel_batchbuffer *batch) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
|
gen9_emit_state_base_address(struct intel_batchbuffer *batch) {
|
||||||
OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (16 - 2));
|
OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (19 - 2));
|
||||||
|
|
||||||
/* general */
|
/* general */
|
||||||
OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
|
OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
|
||||||
@ -546,6 +546,11 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
|
|||||||
OUT_BATCH(0xfffff000 | 1);
|
OUT_BATCH(0xfffff000 | 1);
|
||||||
/* intruction buffer size */
|
/* intruction buffer size */
|
||||||
OUT_BATCH(1 << 12 | 1);
|
OUT_BATCH(1 << 12 | 1);
|
||||||
|
|
||||||
|
/* Bindless surface state base address */
|
||||||
|
OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
|
||||||
|
OUT_BATCH(0);
|
||||||
|
OUT_BATCH(0xfffff000);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
@ -948,7 +953,7 @@ void gen9_render_copyfunc(struct intel_batchbuffer *batch,
|
|||||||
|
|
||||||
gen7_emit_push_constants(batch);
|
gen7_emit_push_constants(batch);
|
||||||
|
|
||||||
gen8_emit_state_base_address(batch);
|
gen9_emit_state_base_address(batch);
|
||||||
|
|
||||||
OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC);
|
OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC);
|
||||||
OUT_BATCH(viewport.cc_state);
|
OUT_BATCH(viewport.cc_state);
|
||||||
|
Loading…
x
Reference in New Issue
Block a user