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tests: add gem_cs_prefetch
Tested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -33,6 +33,7 @@ TESTS_progs = \
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gem_fence_thrash \
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gem_fenced_exec_thrash \
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gem_gtt_speed \
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gem_cs_prefetch \
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gen3_render_linear_blits \
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gen3_render_tiledx_blits \
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gen3_render_tiledy_blits \
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167
tests/gem_cs_prefetch.c
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167
tests/gem_cs_prefetch.c
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@ -0,0 +1,167 @@
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/*
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* Copyright © 2011 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Daniel Vetter <daniel.vetter@ffwll.ch>
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*
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*/
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/*
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* Testcase: Test the CS prefetch behaviour on batches
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*
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* Historically the batch prefetcher doesn't check whether it's crossing page
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* boundaries and likes to throw up when it gets a pagefault in return for his
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* over-eager behaviour. Check for this.
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/time.h>
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#include "drm.h"
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#include "i915_drm.h"
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#include "drmtest.h"
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#include "intel_bufmgr.h"
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#include "intel_batchbuffer.h"
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#include "intel_gpu_tools.h"
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static drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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static void exec(int fd, uint32_t handle)
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{
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struct drm_i915_gem_execbuffer2 execbuf;
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struct drm_i915_gem_exec_object2 gem_exec[1];
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int ret = 0;
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gem_exec[0].handle = handle;
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gem_exec[0].relocation_count = 0;
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gem_exec[0].relocs_ptr = 0;
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gem_exec[0].alignment = 0;
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gem_exec[0].offset = 0;
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gem_exec[0].flags = 0;
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gem_exec[0].rsvd1 = 0;
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gem_exec[0].rsvd2 = 0;
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execbuf.buffers_ptr = (uintptr_t)gem_exec;
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execbuf.buffer_count = 1;
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execbuf.batch_start_offset = 0;
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execbuf.batch_len = 4096;
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execbuf.cliprects_ptr = 0;
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execbuf.num_cliprects = 0;
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execbuf.DR1 = 0;
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execbuf.DR4 = 0;
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execbuf.flags = 0;
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execbuf.rsvd1 = 0;
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execbuf.rsvd2 = 0;
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ret = drmIoctl(fd,
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DRM_IOCTL_I915_GEM_EXECBUFFER2,
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&execbuf);
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gem_sync(fd, handle);
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assert(ret == 0);
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}
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int main(int argc, char **argv)
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{
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uint32_t batch_end[2] = {MI_BATCH_BUFFER_END};
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int fd, i, ret;
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uint64_t aper_size;
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int count;
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drm_intel_bo *sample_batch_bo;
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fd = drm_open_any();
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bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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if (!bufmgr) {
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fprintf(stderr, "failed to init libdrm\n");
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exit(-1);
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}
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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aper_size = gem_aperture_size(fd);
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/* presume a big per-bo overhead */
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if (intel_get_total_ram_mb() < (aper_size / (1024*1024)) * 3 / 2) {
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fprintf(stderr, "not enough mem to run test\n");
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return 77;
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}
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count = aper_size / 4096;
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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assert(batch);
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sample_batch_bo = drm_intel_bo_alloc(bufmgr, "", 4096, 4096);
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assert(sample_batch_bo);
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ret = drm_intel_bo_subdata(sample_batch_bo, 4096-sizeof(batch_end),
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sizeof(batch_end), batch_end);
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assert(ret == 0);
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/* fill the entire gart with batches and run them */
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for (i = 0; i < count; i++) {
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drm_intel_bo *batch_bo;
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batch_bo = drm_intel_bo_alloc(bufmgr, "", 4096, 4096);
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assert(batch_bo);
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/* copy the sample batch with the gpu to the new one, so that we
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* also test the unmappable part of the gtt. */
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BEGIN_BATCH(8);
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OUT_BATCH(XY_SRC_COPY_BLT_CMD |
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XY_SRC_COPY_BLT_WRITE_ALPHA |
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XY_SRC_COPY_BLT_WRITE_RGB);
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OUT_BATCH((3 << 24) | /* 32 bits */
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(0xcc << 16) | /* copy ROP */
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4096);
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OUT_BATCH(0); /* dst y1,x1 */
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OUT_BATCH((1 << 16) | 1024);
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OUT_RELOC(batch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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OUT_BATCH((0 << 16) | 0); /* src x1, y1 */
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OUT_BATCH(4096);
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OUT_RELOC(sample_batch_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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if (i % 100 == 0)
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gem_sync(fd, batch_bo->handle);
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drm_intel_bo_disable_reuse(batch_bo);
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/* launch the newly created batch */
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exec(fd, batch_bo->handle);
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// leak buffers
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//drm_intel_bo_unreference(batch_bo);
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}
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drm_intel_bufmgr_destroy(bufmgr);
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close(fd);
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return 0;
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}
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