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https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-07-23 09:56:02 +00:00
lib/intel_* Use igt checks and macros
Various stuff all over. Most done with the igt.cocci spatch, but with a few fixups by hand. And add igt_core.h includes where needed. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -455,7 +455,7 @@ igt_create_fb_with_bo_size(int fd, int width, int height,
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* The kms id of the created framebuffer.
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*/
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unsigned int igt_create_fb(int fd, int width, int height, uint32_t format,
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unsigned int tiling, struct igt_fb *fb)
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unsigned tiling, struct igt_fb *fb)
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{
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return igt_create_fb_with_bo_size(fd, width, height, format, tiling, fb, 0);
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}
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@ -39,6 +39,7 @@
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#include "i915_drm.h"
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#include "intel_chipset.h"
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#include "igt_core.h"
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/**
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* SECTION:intel_chipset
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@ -74,11 +75,8 @@ intel_get_pci_device(void)
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int error;
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error = pci_system_init();
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if (error != 0) {
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fprintf(stderr, "Couldn't initialize PCI system: %s\n",
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strerror(error));
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exit(1);
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}
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igt_fail_on_f(error != 0,
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"Couldn't initialize PCI system\n");
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/* Grab the graphics card. Try the canonical slot first, then
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* walk the entire PCI bus for a matching device. */
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@ -105,11 +103,8 @@ intel_get_pci_device(void)
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errx(1, "Couldn't find graphics card");
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error = pci_device_probe(pci_dev);
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if (error != 0) {
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fprintf(stderr, "Couldn't probe graphics card: %s\n",
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strerror(error));
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exit(1);
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}
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igt_fail_on_f(error != 0,
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"Couldn't probe graphics card\n");
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if (pci_dev->vendor_id != 0x8086)
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errx(1, "Graphics card is non-intel");
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@ -145,7 +140,7 @@ intel_get_drm_devid(int fd)
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gp.value = (int *)&devid;
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ret = ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp));
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assert(ret == 0);
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igt_assert(ret == 0);
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errno = 0;
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}
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@ -3,8 +3,10 @@
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#include <stdio.h>
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#include <err.h>
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#include <errno.h>
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#include "intel_io.h"
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#include "intel_reg.h"
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#include "igt_core.h"
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#define TIMEOUT_US 500000
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@ -33,8 +35,7 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
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(bar << IOSF_BAR_SHIFT);
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if (intel_register_read(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) {
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fprintf(stderr, "warning: pcode (%s) mailbox access failed\n",
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is_read ? "read" : "write");
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igt_warn("warning: pcode (%s) mailbox access failed\n", is_read ? "read" : "write");
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return -EAGAIN;
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}
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@ -51,8 +52,7 @@ static int vlv_sideband_rw(uint32_t port, uint8_t opcode, uint32_t addr,
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timeout < TIMEOUT_US);
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if (timeout >= TIMEOUT_US) {
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fprintf(stderr, "timeout waiting for pcode %s (%d) to finish\n",
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is_read ? "read" : "write", addr);
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igt_warn("timeout waiting for pcode %s (%d) to finish\n", is_read ? "read" : "write", addr);
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return -ETIMEDOUT;
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}
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@ -42,6 +42,7 @@
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#include <sys/mman.h>
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#include "intel_io.h"
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#include "igt_core.h"
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#include "igt_debugfs.h"
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#include "intel_chipset.h"
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@ -93,18 +94,13 @@ intel_mmio_use_dump_file(char *file)
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struct stat st;
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fd = open(file, O_RDWR);
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if (fd == -1) {
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fprintf(stderr, "Couldn't open %s: %s\n", file,
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strerror(errno));
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exit(1);
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}
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igt_fail_on_f(fd == -1,
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"Couldn't open %s\n", file);
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fstat(fd, &st);
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mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0);
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if (mmio == MAP_FAILED) {
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fprintf(stderr, "Couldn't mmap %s: %s\n", file,
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strerror(errno));
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exit(1);
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}
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igt_fail_on_f(mmio == MAP_FAILED,
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"Couldn't mmap %s\n", file);
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close(fd);
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}
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@ -145,11 +141,8 @@ intel_mmio_use_pci_bar(struct pci_device *pci_dev)
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PCI_DEV_MAP_FLAG_WRITABLE,
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&mmio);
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if (error != 0) {
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fprintf(stderr, "Couldn't map MMIO region: %s\n",
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strerror(error));
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exit(1);
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}
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igt_fail_on_f(error != 0,
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"Couldn't map MMIO region\n");
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}
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static void
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@ -180,7 +173,7 @@ intel_register_access_init(struct pci_device *pci_dev, int safe)
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if (mmio == NULL)
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intel_mmio_use_pci_bar(pci_dev);
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assert(mmio != NULL);
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igt_assert(mmio != NULL);
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if (mmio_data.inited)
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return -1;
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@ -254,10 +247,10 @@ intel_register_read(uint32_t reg)
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struct intel_register_range *range;
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uint32_t ret;
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assert(mmio_data.inited);
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igt_assert(mmio_data.inited);
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if (intel_gen(mmio_data.i915_devid) >= 6)
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assert(mmio_data.key != -1);
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igt_assert(mmio_data.key != -1);
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if (!mmio_data.safe)
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goto read_out;
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@ -267,8 +260,7 @@ intel_register_read(uint32_t reg)
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INTEL_RANGE_READ);
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if(!range) {
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fprintf(stderr, "Register read blocked for safety "
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"(*0x%08x)\n", reg);
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igt_warn("Register read blocked for safety ""(*0x%08x)\n", reg);
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ret = 0xffffffff;
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goto out;
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}
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@ -295,10 +287,10 @@ intel_register_write(uint32_t reg, uint32_t val)
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{
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struct intel_register_range *range;
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assert(mmio_data.inited);
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igt_assert(mmio_data.inited);
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if (intel_gen(mmio_data.i915_devid) >= 6)
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assert(mmio_data.key != -1);
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igt_assert(mmio_data.key != -1);
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if (!mmio_data.safe)
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goto write_out;
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@ -307,10 +299,8 @@ intel_register_write(uint32_t reg, uint32_t val)
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reg,
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INTEL_RANGE_WRITE);
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if (!range) {
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fprintf(stderr, "Register write blocked for safety "
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"(*0x%08x = 0x%x)\n", reg, val);
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}
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igt_warn_on_f(!range,
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"Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
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write_out:
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*(volatile uint32_t *)((volatile char *)mmio + reg) = val;
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@ -67,7 +67,7 @@ intel_get_total_ram_mb(void)
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int ret;
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ret = sysinfo(&sysinf);
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assert(ret == 0);
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igt_assert(ret == 0);
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retval = sysinf.totalram;
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retval *= sysinf.mem_unit;
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@ -108,7 +108,7 @@ intel_get_avail_ram_mb(void)
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}
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ret = sysinfo(&sysinf);
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assert(ret == 0);
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igt_assert(ret == 0);
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retval = sysinf.freeram;
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retval *= sysinf.mem_unit;
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@ -142,7 +142,7 @@ intel_get_total_swap_mb(void)
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int ret;
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ret = sysinfo(&sysinf);
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assert(ret == 0);
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igt_assert(ret == 0);
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retval = sysinf.freeswap;
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retval *= sysinf.mem_unit;
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@ -154,7 +154,7 @@ intel_get_total_swap_mb(void)
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int n, i;
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if ((n = swapctl(SC_GETNSWP, NULL)) == -1) {
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perror("swapctl: GETNSWP");
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igt_warn("swapctl: GETNSWP");
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return 0;
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}
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if (n == 0) {
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@ -165,7 +165,7 @@ intel_get_total_swap_mb(void)
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swt = malloc(sizeof(struct swaptable) + (n * sizeof(swapent_t)));
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buf = malloc(n * MAXPATHLEN);
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if (!swt || !buf) {
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perror("malloc");
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igt_warn("malloc");
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} else {
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swt->swt_n = n;
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for (i = 0 ; i < n; i++) {
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@ -173,7 +173,7 @@ intel_get_total_swap_mb(void)
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}
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if ((n = swapctl(SC_LIST, swt)) == -1) {
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perror("swapctl: LIST");
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igt_warn("swapctl: LIST");
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} else {
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for (i = 0; i < swt->swt_n; i++) {
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totalpages += swt->swt_ent[i].ste_pages;
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@ -273,8 +273,8 @@ void *mmio;
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int main(int argc, char **argv)
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{
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printf("Total RAM: %" PRIu64 " Mb\n", intel_get_total_ram_mb());
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printf("Total Swap: %" PRIu64 " Mb\n", intel_get_total_swap_mb());
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igt_info("Total RAM: %"PRIu64" Mb\n", intel_get_total_ram_mb());
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igt_info("Total Swap: %"PRIu64" Mb\n", intel_get_total_swap_mb());
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return 0;
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}
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#include <stdarg.h>
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#include <stdlib.h>
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#include <sys/types.h>
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#include "intel_io.h"
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#include "intel_chipset.h"
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#include "igt_core.h"
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static struct intel_register_range gen_bwcl_register_map[] = {
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{0x00000000, 0x00000fff, INTEL_RANGE_RW},
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@ -141,9 +143,7 @@ intel_get_register_map(uint32_t devid)
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map.map = gen4_register_map;
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map.top = 0x80000;
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} else {
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fprintf(stderr, "Gen2/3 Ranges are not supported. Please use "
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"unsafe access.");
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abort();
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igt_fail_on("Gen2/3 Ranges are not supported. Please use ""unsafe access.");
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}
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map.alignment_mask = 0x3;
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