mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-26 09:16:34 +00:00
gem_stress: Add render copyfunc for SandyBridge
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
parent
d73cdde45a
commit
719ffef7c3
@ -197,3 +197,10 @@ intel_copy_bo(struct intel_batchbuffer *batch,
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intel_batchbuffer_flush(batch);
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}
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void
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intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
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{
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intel_batchbuffer_require_space(batch, 4);
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intel_batchbuffer_emit_dword(batch, MI_FLUSH);
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}
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@ -3,13 +3,11 @@
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#include <assert.h>
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#include "intel_bufmgr.h"
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#include "intel_reg.h"
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#define BATCH_SZ 4096
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#define BATCH_RESERVED 16
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struct intel_batchbuffer
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{
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struct intel_batchbuffer {
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drm_intel_bufmgr *bufmgr;
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uint32_t devid;
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@ -93,13 +91,8 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
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#define ADVANCE_BATCH() do { \
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} while(0)
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static inline void
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intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
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{
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intel_batchbuffer_require_space(batch, 4);
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intel_batchbuffer_emit_dword(batch, MI_FLUSH);
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}
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void
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intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch);
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void intel_copy_bo(struct intel_batchbuffer *batch,
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drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
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260
lib/intel_reg.h
260
lib/intel_reg.h
@ -2694,27 +2694,17 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21)
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#define XY_MONO_SRC_BLT_WRITE_RGB (1<<20)
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#define STATE3D_FOG_MODE ((3<<29)|(0x1d<<24)|(0x89<<16)|2)
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#define FOG_MODE_VERTEX (1<<31)
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#define DISABLE_TEX_TRANSFORM (1<<28)
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#define TEXTURE_SET(x) (x<<29)
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#define STATE3D_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16))
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#define DISABLE_VIEWPORT_TRANSFORM (1<<31)
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#define DISABLE_PERSPECTIVE_DIVIDE (1<<29)
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#define MI_STORE_DWORD_IMM ((0x20<<23)|2)
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#define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */
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#define MI_SET_CONTEXT (0x18<<23)
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#define CTXT_NO_RESTORE (1)
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#define CTXT_NO_RESTORE (1)
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#define CTXT_PALETTE_SAVE_DISABLE (1<<3)
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#define CTXT_PALETTE_RESTORE_DISABLE (1<<2)
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/* Dword 0 */
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#define MI_VERTEX_BUFFER (0x17<<23)
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#define MI_VERTEX_BUFFER_IDX(x) (x<<20)
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#define MI_VERTEX_BUFFER_IDX(x) (x<<20)
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#define MI_VERTEX_BUFFER_PITCH(x) (x<<13)
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#define MI_VERTEX_BUFFER_WIDTH(x) (x<<6)
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/* Dword 1 */
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@ -2763,252 +2753,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#define MI_BATCH_NON_SECURE (1)
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#define MI_BATCH_NON_SECURE_I965 (1 << 8)
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/* STATE3D_FOG_MODE stuff */
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#define ENABLE_FOG_SOURCE (1<<27)
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#define ENABLE_FOG_CONST (1<<24)
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#define ENABLE_FOG_DENSITY (1<<23)
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/*
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* New regs for broadwater -- we need to split this file up sensibly somehow.
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*/
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#define BRW_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \
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((Pipeline) << 27) | \
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((Opcode) << 24) | \
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((Subopcode) << 16))
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#define BRW_URB_FENCE BRW_3D(0, 0, 0)
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#define BRW_CS_URB_STATE BRW_3D(0, 0, 1)
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#define BRW_CONSTANT_BUFFER BRW_3D(0, 0, 2)
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#define BRW_STATE_PREFETCH BRW_3D(0, 0, 3)
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#define BRW_STATE_BASE_ADDRESS BRW_3D(0, 1, 1)
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#define BRW_STATE_SIP BRW_3D(0, 1, 2)
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#define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4)
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#define NEW_PIPELINE_SELECT BRW_3D(1, 1, 4)
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#define BRW_MEDIA_STATE_POINTERS BRW_3D(2, 0, 0)
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#define BRW_MEDIA_OBJECT BRW_3D(2, 1, 0)
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#define BRW_3DSTATE_PIPELINED_POINTERS BRW_3D(3, 0, 0)
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#define BRW_3DSTATE_BINDING_TABLE_POINTERS BRW_3D(3, 0, 1)
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#define BRW_3DSTATE_VERTEX_BUFFERS BRW_3D(3, 0, 8)
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#define BRW_3DSTATE_VERTEX_ELEMENTS BRW_3D(3, 0, 9)
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#define BRW_3DSTATE_INDEX_BUFFER BRW_3D(3, 0, 0xa)
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#define BRW_3DSTATE_VF_STATISTICS BRW_3D(3, 0, 0xb)
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#define BRW_3DSTATE_DRAWING_RECTANGLE BRW_3D(3, 1, 0)
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#define BRW_3DSTATE_CONSTANT_COLOR BRW_3D(3, 1, 1)
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#define BRW_3DSTATE_SAMPLER_PALETTE_LOAD BRW_3D(3, 1, 2)
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#define BRW_3DSTATE_CHROMA_KEY BRW_3D(3, 1, 4)
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#define BRW_3DSTATE_DEPTH_BUFFER BRW_3D(3, 1, 5)
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#define BRW_3DSTATE_POLY_STIPPLE_OFFSET BRW_3D(3, 1, 6)
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#define BRW_3DSTATE_POLY_STIPPLE_PATTERN BRW_3D(3, 1, 7)
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#define BRW_3DSTATE_LINE_STIPPLE BRW_3D(3, 1, 8)
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#define BRW_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP BRW_3D(3, 1, 9)
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/* These two are BLC and CTG only, not BW or CL */
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#define BRW_3DSTATE_AA_LINE_PARAMS BRW_3D(3, 1, 0xa)
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#define BRW_3DSTATE_GS_SVB_INDEX BRW_3D(3, 1, 0xb)
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#define BRW_PIPE_CONTROL BRW_3D(3, 2, 0)
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#define BRW_3DPRIMITIVE BRW_3D(3, 3, 0)
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#define PIPELINE_SELECT_3D 0
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#define PIPELINE_SELECT_MEDIA 1
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#define UF0_CS_REALLOC (1 << 13)
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#define UF0_VFE_REALLOC (1 << 12)
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#define UF0_SF_REALLOC (1 << 11)
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#define UF0_CLIP_REALLOC (1 << 10)
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#define UF0_GS_REALLOC (1 << 9)
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#define UF0_VS_REALLOC (1 << 8)
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#define UF1_CLIP_FENCE_SHIFT 20
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#define UF1_GS_FENCE_SHIFT 10
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#define UF1_VS_FENCE_SHIFT 0
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#define UF2_CS_FENCE_SHIFT 20
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#define UF2_VFE_FENCE_SHIFT 10
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#define UF2_SF_FENCE_SHIFT 0
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/* for BRW_STATE_BASE_ADDRESS */
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#define BASE_ADDRESS_MODIFY (1 << 0)
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/* for BRW_3DSTATE_PIPELINED_POINTERS */
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#define BRW_GS_DISABLE 0
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#define BRW_GS_ENABLE 1
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#define BRW_CLIP_DISABLE 0
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#define BRW_CLIP_ENABLE 1
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/* for BRW_PIPE_CONTROL */
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#define BRW_PIPE_CONTROL_NOWRITE (0 << 14)
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#define BRW_PIPE_CONTROL_WRITE_QWORD (1 << 14)
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#define BRW_PIPE_CONTROL_WRITE_DEPTH (2 << 14)
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#define BRW_PIPE_CONTROL_WRITE_TIME (3 << 14)
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#define BRW_PIPE_CONTROL_DEPTH_STALL (1 << 13)
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#define BRW_PIPE_CONTROL_WC_FLUSH (1 << 12)
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#define BRW_PIPE_CONTROL_IS_FLUSH (1 << 11)
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#define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
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#define BRW_PIPE_CONTROL_GLOBAL_GTT (1 << 2)
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#define BRW_PIPE_CONTROL_LOCAL_PGTT (0 << 2)
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/* VERTEX_BUFFER_STATE Structure */
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#define VB0_BUFFER_INDEX_SHIFT 27
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#define VB0_VERTEXDATA (0 << 26)
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#define VB0_INSTANCEDATA (1 << 26)
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#define VB0_BUFFER_PITCH_SHIFT 0
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/* VERTEX_ELEMENT_STATE Structure */
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#define VE0_VERTEX_BUFFER_INDEX_SHIFT 27
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#define VE0_VALID (1 << 26)
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#define VE0_FORMAT_SHIFT 16
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#define VE0_OFFSET_SHIFT 0
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#define VE1_VFCOMPONENT_0_SHIFT 28
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#define VE1_VFCOMPONENT_1_SHIFT 24
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#define VE1_VFCOMPONENT_2_SHIFT 20
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#define VE1_VFCOMPONENT_3_SHIFT 16
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#define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0
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/* 3DPRIMITIVE bits */
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#define BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15)
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#define BRW_3DPRIMITIVE_VERTEX_RANDOM (1 << 15)
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/* Primitive types are in brw_defines.h */
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#define BRW_3DPRIMITIVE_TOPOLOGY_SHIFT 10
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#define BRW_SVG_CTL 0x7400
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#define BRW_SVG_CTL_GS_BA (0 << 8)
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#define BRW_SVG_CTL_SS_BA (1 << 8)
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#define BRW_SVG_CTL_IO_BA (2 << 8)
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#define BRW_SVG_CTL_GS_AUB (3 << 8)
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#define BRW_SVG_CTL_IO_AUB (4 << 8)
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#define BRW_SVG_CTL_SIP (5 << 8)
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#define BRW_SVG_RDATA 0x7404
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#define BRW_SVG_WORK_CTL 0x7408
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#define BRW_VF_CTL 0x7500
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#define BRW_VF_CTL_SNAPSHOT_COMPLETE (1 << 31)
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#define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8)
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#define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8)
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#define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4)
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#define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4)
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#define BRW_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3)
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#define BRW_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2)
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#define BRW_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1)
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#define BRW_VF_CTL_SNAPSHOT_ENABLE (1 << 0)
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#define BRW_VF_STRG_VAL 0x7504
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#define BRW_VF_STR_VL_OVR 0x7508
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#define BRW_VF_VC_OVR 0x750c
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#define BRW_VF_STR_PSKIP 0x7510
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#define BRW_VF_MAX_PRIM 0x7514
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#define BRW_VF_RDATA 0x7518
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#define BRW_VS_CTL 0x7600
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#define BRW_VS_CTL_SNAPSHOT_COMPLETE (1 << 31)
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#define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8)
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#define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8)
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#define BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8)
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#define BRW_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8)
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#define BRW_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
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#define BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
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#define BRW_VS_CTL_SNAPSHOT_ENABLE (1 << 0)
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#define BRW_VS_STRG_VAL 0x7604
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#define BRW_VS_RDATA 0x7608
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#define BRW_SF_CTL 0x7b00
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#define BRW_SF_CTL_SNAPSHOT_COMPLETE (1 << 31)
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#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8)
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#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8)
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#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8)
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#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8)
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#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8)
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#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8)
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#define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8)
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#define BRW_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8)
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#define BRW_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4)
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#define BRW_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3)
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#define BRW_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
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#define BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
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#define BRW_SF_CTL_SNAPSHOT_ENABLE (1 << 0)
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#define BRW_SF_STRG_VAL 0x7b04
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#define BRW_SF_RDATA 0x7b18
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#define BRW_WIZ_CTL 0x7c00
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#define BRW_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31)
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#define BRW_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16
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#define BRW_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8)
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#define BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8)
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#define BRW_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8)
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#define BRW_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6)
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#define BRW_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5)
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#define BRW_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4)
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#define BRW_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3)
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#define BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2)
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#define BRW_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1)
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#define BRW_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0)
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#define BRW_WIZ_STRG_VAL 0x7c04
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#define BRW_WIZ_RDATA 0x7c18
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#define BRW_TS_CTL 0x7e00
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#define BRW_TS_CTL_SNAPSHOT_COMPLETE (1 << 31)
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#define BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8)
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#define BRW_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8)
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#define BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2)
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#define BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1)
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#define BRW_TS_CTL_SNAPSHOT_ENABLE (1 << 0)
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#define BRW_TS_STRG_VAL 0x7e04
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#define BRW_TS_RDATA 0x7e08
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#define BRW_TD_CTL 0x8000
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#define BRW_TD_CTL_MUX_SHIFT 8
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#define BRW_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7)
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#define BRW_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6)
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#define BRW_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5)
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#define BRW_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4)
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#define BRW_TD_CTL_BREAKPOINT_ENABLE (1 << 2)
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#define BRW_TD_CTL2 0x8004
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#define BRW_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28)
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#define BRW_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26)
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#define BRW_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25)
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#define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16
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#define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8)
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#define BRW_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7)
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#define BRW_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6)
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#define BRW_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5)
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#define BRW_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4)
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#define BRW_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3)
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#define BRW_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0)
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#define BRW_TD_VF_VS_EMSK 0x8008
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#define BRW_TD_GS_EMSK 0x800c
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#define BRW_TD_CLIP_EMSK 0x8010
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#define BRW_TD_SF_EMSK 0x8014
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#define BRW_TD_WIZ_EMSK 0x8018
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#define BRW_TD_0_6_EHTRG_VAL 0x801c
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#define BRW_TD_0_7_EHTRG_VAL 0x8020
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#define BRW_TD_0_6_EHTRG_MSK 0x8024
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#define BRW_TD_0_7_EHTRG_MSK 0x8028
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#define BRW_TD_RDATA 0x802c
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#define BRW_TD_TS_EMSK 0x8030
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#define BRW_EU_CTL 0x8800
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#define BRW_EU_CTL_SELECT_SHIFT 16
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#define BRW_EU_CTL_DATA_MUX_SHIFT 8
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#define BRW_EU_ATT_0 0x8810
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#define BRW_EU_ATT_1 0x8814
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#define BRW_EU_ATT_DATA_0 0x8820
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#define BRW_EU_ATT_DATA_1 0x8824
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#define BRW_EU_ATT_CLR_0 0x8830
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#define BRW_EU_ATT_CLR_1 0x8834
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#define BRW_EU_RDATA 0x8840
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/* End regs for broadwater */
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#define MAX_DISPLAY_PIPES 2
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typedef enum {
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@ -7,7 +7,10 @@ gem_stress_SOURCES = \
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gem_stress.c \
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gem_stress.h \
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gem_stress_i915.c \
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gem_stress_i830.c
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gem_stress_i830.c \
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gen6_render.h \
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gem_stress_gen6.c \
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$(NULL)
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TESTS = getversion \
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getclient \
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@ -300,6 +300,10 @@ static void render_copyfunc(struct scratch_buf *src, unsigned src_x, unsigned sr
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gen3_render_copyfunc(src, src_x, src_y,
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dst, dst_x, dst_y,
|
||||
logical_tile_no);
|
||||
else if (IS_GEN6(devid))
|
||||
gen6_render_copyfunc(src, src_x, src_y,
|
||||
dst, dst_x, dst_y,
|
||||
logical_tile_no);
|
||||
else
|
||||
blitter_copyfunc(src, src_x, src_y,
|
||||
dst, dst_x, dst_y,
|
||||
@ -310,7 +314,7 @@ static void next_copyfunc(int tile)
|
||||
{
|
||||
if (fence_storm) {
|
||||
if (tile == options.trace_tile)
|
||||
printf(" using fence storm\n");
|
||||
printf(" using fence storm\n");
|
||||
return;
|
||||
}
|
||||
|
||||
@ -417,12 +421,12 @@ static void permute_array(void *array, unsigned size,
|
||||
void (*exchange_func)(void *array, unsigned i, unsigned j))
|
||||
{
|
||||
int i;
|
||||
long int l;
|
||||
|
||||
for (i = size - 1; i > 1; i--) {
|
||||
l = random();
|
||||
l %= i+1; /* yes, no perfectly uniform, who cares */
|
||||
exchange_func(array, i, l);
|
||||
/* yes, not perfectly uniform, who cares */
|
||||
long l = random() % (i +1);
|
||||
if (i != l)
|
||||
exchange_func(array, i, l);
|
||||
}
|
||||
}
|
||||
|
||||
@ -437,7 +441,7 @@ static void exchange_buf(void *array, unsigned i, unsigned j)
|
||||
}
|
||||
|
||||
|
||||
/* libdrm is to clever and prevents us from changin tiling of buffers already
|
||||
/* libdrm is too clever and prevents us from changing tiling of buffers already
|
||||
* used in relocations. */
|
||||
static void set_tiling(drm_intel_bo *bo, unsigned *tiling, unsigned stride)
|
||||
{
|
||||
@ -533,7 +537,7 @@ static void copy_tiles(unsigned *permutation)
|
||||
struct scratch_buf *src_buf, *dst_buf;
|
||||
int i, idx;
|
||||
for (i = 0; i < num_total_tiles; i++) {
|
||||
/* tile_permutation is independant of current_permutation, so
|
||||
/* tile_permutation is independent of current_permutation, so
|
||||
* abuse it to randomize the order of the src bos */
|
||||
idx = tile_permutation[i];
|
||||
src_buf_idx = idx / TILES_PER_BUF;
|
||||
@ -721,6 +725,35 @@ static void init(void)
|
||||
srandom(0xdeadbeef);
|
||||
}
|
||||
|
||||
static void check_render_copyfunc(void)
|
||||
{
|
||||
struct scratch_buf src, dst;
|
||||
uint32_t *ptr;
|
||||
int i, j;
|
||||
|
||||
init_buffer(&src, options.scratch_buf_size);
|
||||
init_buffer(&dst, options.scratch_buf_size);
|
||||
|
||||
memset(src.data, 0xff, options.scratch_buf_size);
|
||||
for (j = 0; j < TILE_SIZE; j++) {
|
||||
ptr = (uint32_t*)((char *)src.data + j * src.stride);
|
||||
for (i = 0; i < TILE_SIZE; i++)
|
||||
ptr[i] = j * TILE_SIZE + i;
|
||||
}
|
||||
|
||||
render_copyfunc(&src, 0, 0, &dst, 0, 0, 0);
|
||||
|
||||
for (j = 0; j < TILE_SIZE; j++) {
|
||||
ptr = (uint32_t*)((char *)dst.data + j * dst.stride);
|
||||
for (i = 0; i < TILE_SIZE; i++)
|
||||
if (ptr[i] != j * TILE_SIZE + i) {
|
||||
printf("render copyfunc mismatch at (%d, %d): found %d, expected %d\n",
|
||||
i, j, ptr[i], j*TILE_SIZE + i);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
int i, j;
|
||||
@ -730,6 +763,8 @@ int main(int argc, char **argv)
|
||||
|
||||
init();
|
||||
|
||||
check_render_copyfunc();
|
||||
|
||||
tile_permutation = malloc(num_total_tiles*sizeof(uint32_t));
|
||||
current_permutation = malloc(num_total_tiles*sizeof(uint32_t));
|
||||
tmp_permutation = malloc(num_total_tiles*sizeof(uint32_t));
|
||||
|
||||
@ -52,6 +52,11 @@ extern int fence_storm;
|
||||
|
||||
void keep_gpu_busy(void);
|
||||
|
||||
static inline void emit_vertex_2s(int16_t x, int16_t y)
|
||||
{
|
||||
OUT_BATCH((uint16_t)y << 16 | (uint16_t)x);
|
||||
}
|
||||
|
||||
static inline void emit_vertex(float f)
|
||||
{
|
||||
union { float f; uint32_t ui; } u;
|
||||
@ -76,6 +81,9 @@ static inline unsigned buf_height(struct scratch_buf *buf)
|
||||
return options.scratch_buf_size/buf->stride;
|
||||
}
|
||||
|
||||
void gen6_render_copyfunc(struct scratch_buf *src, unsigned src_x, unsigned src_y,
|
||||
struct scratch_buf *dst, unsigned dst_x, unsigned dst_y,
|
||||
unsigned logical_tile_no);
|
||||
void gen3_render_copyfunc(struct scratch_buf *src, unsigned src_x, unsigned src_y,
|
||||
struct scratch_buf *dst, unsigned dst_x, unsigned dst_y,
|
||||
unsigned logical_tile_no);
|
||||
|
||||
595
tests/gem_stress_gen6.c
Normal file
595
tests/gem_stress_gen6.c
Normal file
@ -0,0 +1,595 @@
|
||||
#include "gem_stress.h"
|
||||
#include "gen6_render.h"
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
|
||||
#define VERTEX_SIZE (3*4)
|
||||
|
||||
static const uint32_t ps_kernel_nomask_affine[][4] = {
|
||||
{ 0x0060005a, 0x204077be, 0x000000c0, 0x008d0040 },
|
||||
{ 0x0060005a, 0x206077be, 0x000000c0, 0x008d0080 },
|
||||
{ 0x0060005a, 0x208077be, 0x000000d0, 0x008d0040 },
|
||||
{ 0x0060005a, 0x20a077be, 0x000000d0, 0x008d0080 },
|
||||
{ 0x00000201, 0x20080061, 0x00000000, 0x00000000 },
|
||||
{ 0x00600001, 0x20200022, 0x008d0000, 0x00000000 },
|
||||
{ 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 },
|
||||
{ 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 },
|
||||
{ 0x00600001, 0x206003be, 0x008d01e0, 0x00000000 },
|
||||
{ 0x00600001, 0x208003be, 0x008d0200, 0x00000000 },
|
||||
{ 0x00600001, 0x20a003be, 0x008d0220, 0x00000000 },
|
||||
{ 0x00600001, 0x20c003be, 0x008d0240, 0x00000000 },
|
||||
{ 0x00600001, 0x20e003be, 0x008d0260, 0x00000000 },
|
||||
{ 0x00600001, 0x210003be, 0x008d0280, 0x00000000 },
|
||||
{ 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 },
|
||||
{ 0x05800031, 0x24001cc8, 0x00000040, 0x90019000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
{ 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
|
||||
};
|
||||
|
||||
static uint32_t
|
||||
batch_used(void)
|
||||
{
|
||||
return batch->ptr - batch->buffer;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
batch_align(uint32_t align)
|
||||
{
|
||||
uint32_t offset = batch_used();
|
||||
offset = ALIGN(offset, align);
|
||||
batch->ptr = batch->buffer + offset;
|
||||
return offset;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
batch_round_upto(uint32_t div)
|
||||
{
|
||||
uint32_t offset = batch_used();
|
||||
offset = (offset + div-1) / div * div;
|
||||
batch->ptr = batch->buffer + offset;
|
||||
return offset;
|
||||
}
|
||||
|
||||
static void *
|
||||
batch_alloc(uint32_t size, uint32_t align)
|
||||
{
|
||||
uint32_t offset = batch_align(align);
|
||||
batch->ptr += size;
|
||||
return memset(batch->buffer + offset, 0, size);
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
batch_offset(void *ptr)
|
||||
{
|
||||
return (uint8_t *)ptr - batch->buffer;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
batch_copy(const void *ptr, uint32_t size, uint32_t align)
|
||||
{
|
||||
return batch_offset(memcpy(batch_alloc(size, align), ptr, size));
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_render_flush(uint32_t batch_end)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
|
||||
if (ret == 0)
|
||||
ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
|
||||
NULL, 0, 0, 0);
|
||||
assert(ret == 0);
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
gen6_bind_buf(struct scratch_buf *buf,
|
||||
uint32_t format, int is_dst)
|
||||
{
|
||||
struct gen6_surface_state *ss;
|
||||
uint32_t write_domain, read_domain;
|
||||
int ret;
|
||||
|
||||
if (is_dst) {
|
||||
write_domain = read_domain = I915_GEM_DOMAIN_RENDER;
|
||||
} else {
|
||||
write_domain = 0;
|
||||
read_domain = I915_GEM_DOMAIN_SAMPLER;
|
||||
}
|
||||
|
||||
ss = batch_alloc(sizeof(*ss), 32);
|
||||
ss->ss0.surface_type = GEN6_SURFACE_2D;
|
||||
ss->ss0.surface_format = format;
|
||||
|
||||
ss->ss0.data_return_format = GEN6_SURFACERETURNFORMAT_FLOAT32;
|
||||
ss->ss0.color_blend = 1;
|
||||
ss->ss1.base_addr = buf->bo->offset;
|
||||
|
||||
ret = drm_intel_bo_emit_reloc(batch->bo,
|
||||
batch_offset(ss) + 4,
|
||||
buf->bo, 0,
|
||||
read_domain, write_domain);
|
||||
assert(ret == 0);
|
||||
|
||||
ss->ss2.height = buf_height(buf) - 1;
|
||||
ss->ss2.width = buf_width(buf) - 1;
|
||||
ss->ss3.pitch = buf->stride - 1;
|
||||
ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE;
|
||||
ss->ss3.tile_walk = buf->tiling == I915_TILING_Y;
|
||||
|
||||
return batch_offset(ss);
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
gen6_bind_surfaces(struct scratch_buf *src,
|
||||
struct scratch_buf *dst)
|
||||
{
|
||||
uint32_t *binding_table;
|
||||
|
||||
binding_table = batch_alloc(32, 32);
|
||||
|
||||
binding_table[0] =
|
||||
gen6_bind_buf(dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1);
|
||||
binding_table[1] =
|
||||
gen6_bind_buf(src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0);
|
||||
|
||||
return batch_offset(binding_table);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_sip(void)
|
||||
{
|
||||
OUT_BATCH(GEN6_STATE_SIP | 0);
|
||||
OUT_BATCH(0);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_urb(void)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_URB | (3 - 2));
|
||||
OUT_BATCH((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT |
|
||||
24 << GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT); /* at least 24 on GEN6 */
|
||||
OUT_BATCH(0 << GEN6_3DSTATE_URB_GS_SIZE_SHIFT |
|
||||
0 << GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT); /* no GS thread */
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_state_base_address(void)
|
||||
{
|
||||
OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (10 - 2));
|
||||
OUT_BATCH(0); /* general */
|
||||
OUT_RELOC(batch->bo, /* surface */
|
||||
I915_GEM_DOMAIN_INSTRUCTION, 0,
|
||||
BASE_ADDRESS_MODIFY);
|
||||
OUT_RELOC(batch->bo, /* instruction */
|
||||
I915_GEM_DOMAIN_INSTRUCTION, 0,
|
||||
BASE_ADDRESS_MODIFY);
|
||||
OUT_BATCH(0); /* indirect */
|
||||
OUT_RELOC(batch->bo, /* dynamic */
|
||||
I915_GEM_DOMAIN_INSTRUCTION, 0,
|
||||
BASE_ADDRESS_MODIFY);
|
||||
|
||||
/* upper bounds, disable */
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(BASE_ADDRESS_MODIFY);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(BASE_ADDRESS_MODIFY);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_viewports(uint32_t cc_vp)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_VIEWPORT_STATE_POINTERS |
|
||||
GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC |
|
||||
(4 - 2));
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(cc_vp);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_vs(void)
|
||||
{
|
||||
/* disable VS constant buffer */
|
||||
OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (5 - 2));
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
|
||||
OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2));
|
||||
OUT_BATCH(0); /* no VS kernel */
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0); /* pass-through */
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_gs(void)
|
||||
{
|
||||
/* disable GS constant buffer */
|
||||
OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (5 - 2));
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
|
||||
OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2));
|
||||
OUT_BATCH(0); /* no GS kernel */
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0); /* pass-through */
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_clip(void)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2));
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0); /* pass-through */
|
||||
OUT_BATCH(0);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_wm_constants(void)
|
||||
{
|
||||
/* disable WM constant buffer */
|
||||
OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (5 - 2));
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_null_depth_buffer(void)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_DEPTH_BUFFER | (7 - 2));
|
||||
OUT_BATCH(GEN6_SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT |
|
||||
GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
|
||||
OUT_BATCH(GEN6_3DSTATE_CLEAR_PARAMS | (2 - 2));
|
||||
OUT_BATCH(0);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_invariant(void)
|
||||
{
|
||||
OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
|
||||
|
||||
OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (3 - 2));
|
||||
OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER |
|
||||
GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */
|
||||
OUT_BATCH(0);
|
||||
|
||||
OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2));
|
||||
OUT_BATCH(1);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_cc(uint32_t blend)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2));
|
||||
OUT_BATCH(blend | 1);
|
||||
OUT_BATCH(1024 | 1);
|
||||
OUT_BATCH(1024 | 1);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_sampler(uint32_t state)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_SAMPLER_STATE_POINTERS |
|
||||
GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS |
|
||||
(4 - 2));
|
||||
OUT_BATCH(0); /* VS */
|
||||
OUT_BATCH(0); /* GS */
|
||||
OUT_BATCH(state);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_sf(void)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_SF | (20 - 2));
|
||||
OUT_BATCH(1 << GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT |
|
||||
1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT |
|
||||
1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE);
|
||||
OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); /* DW4 */
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0); /* DW9 */
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0); /* DW14 */
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0); /* DW19 */
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_wm(int kernel)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_WM | (9 - 2));
|
||||
OUT_BATCH(kernel);
|
||||
OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT |
|
||||
2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT); /* DW4 */
|
||||
OUT_BATCH((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT |
|
||||
GEN6_3DSTATE_WM_DISPATCH_ENABLE |
|
||||
GEN6_3DSTATE_WM_16_DISPATCH_ENABLE);
|
||||
OUT_BATCH(1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT |
|
||||
GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC);
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH(0);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_binding_table(uint32_t wm_table)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_BINDING_TABLE_POINTERS |
|
||||
GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS |
|
||||
(4 - 2));
|
||||
OUT_BATCH(0); /* vs */
|
||||
OUT_BATCH(0); /* gs */
|
||||
OUT_BATCH(wm_table);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_drawing_rectangle(struct scratch_buf *dst)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2));
|
||||
OUT_BATCH(0);
|
||||
OUT_BATCH((buf_height(dst) - 1) << 16 | (buf_width(dst) - 1));
|
||||
OUT_BATCH(0);
|
||||
}
|
||||
|
||||
static void
|
||||
gen6_emit_vertex_elements(void)
|
||||
{
|
||||
/* The VUE layout
|
||||
* dword 0-3: pad (0.0, 0.0, 0.0. 0.0)
|
||||
* dword 4-7: position (x, y, 1.0, 1.0),
|
||||
* dword 8-11: texture coordinate 0 (u0, v0, 0, 0)
|
||||
*
|
||||
* dword 4-11 are fetched from vertex buffer
|
||||
*/
|
||||
OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (2 * 3 + 1 - 2));
|
||||
|
||||
OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
|
||||
GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT |
|
||||
0 << VE0_OFFSET_SHIFT);
|
||||
OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT);
|
||||
|
||||
/* x,y */
|
||||
OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
|
||||
GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT |
|
||||
0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */
|
||||
OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT);
|
||||
|
||||
/* u0, v0 */
|
||||
OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID |
|
||||
GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT |
|
||||
4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */
|
||||
OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
|
||||
GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT);
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
gen6_create_cc_viewport(void)
|
||||
{
|
||||
struct gen6_cc_viewport *vp;
|
||||
|
||||
vp = batch_alloc(sizeof(*vp), 32);
|
||||
|
||||
vp->min_depth = -1.e35;
|
||||
vp->max_depth = 1.e35;
|
||||
|
||||
return batch_offset(vp);
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
gen6_create_cc_blend(void)
|
||||
{
|
||||
struct gen6_blend_state *blend;
|
||||
|
||||
blend = batch_alloc(sizeof(*blend), 64);
|
||||
|
||||
blend->blend0.dest_blend_factor = GEN6_BLENDFACTOR_ZERO;
|
||||
blend->blend0.source_blend_factor = GEN6_BLENDFACTOR_ONE;
|
||||
blend->blend0.blend_func = GEN6_BLENDFUNCTION_ADD;
|
||||
blend->blend0.blend_enable = 1;
|
||||
|
||||
blend->blend1.post_blend_clamp_enable = 1;
|
||||
blend->blend1.pre_blend_clamp_enable = 1;
|
||||
|
||||
return batch_offset(blend);
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
gen6_create_kernel(void)
|
||||
{
|
||||
return batch_copy(ps_kernel_nomask_affine,
|
||||
sizeof(ps_kernel_nomask_affine),
|
||||
64);
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
gen6_create_sampler(sampler_filter_t filter,
|
||||
sampler_extend_t extend)
|
||||
{
|
||||
struct gen6_sampler_state *ss;
|
||||
|
||||
ss = batch_alloc(sizeof(*ss), 32);
|
||||
ss->ss0.lod_preclamp = 1; /* GL mode */
|
||||
|
||||
/* We use the legacy mode to get the semantics specified by
|
||||
* the Render extension. */
|
||||
ss->ss0.border_color_mode = GEN6_BORDER_COLOR_MODE_LEGACY;
|
||||
|
||||
switch (filter) {
|
||||
default:
|
||||
case SAMPLER_FILTER_NEAREST:
|
||||
ss->ss0.min_filter = GEN6_MAPFILTER_NEAREST;
|
||||
ss->ss0.mag_filter = GEN6_MAPFILTER_NEAREST;
|
||||
break;
|
||||
case SAMPLER_FILTER_BILINEAR:
|
||||
ss->ss0.min_filter = GEN6_MAPFILTER_LINEAR;
|
||||
ss->ss0.mag_filter = GEN6_MAPFILTER_LINEAR;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (extend) {
|
||||
default:
|
||||
case SAMPLER_EXTEND_NONE:
|
||||
ss->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER;
|
||||
ss->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER;
|
||||
ss->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER;
|
||||
break;
|
||||
case SAMPLER_EXTEND_REPEAT:
|
||||
ss->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_WRAP;
|
||||
ss->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_WRAP;
|
||||
ss->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_WRAP;
|
||||
break;
|
||||
case SAMPLER_EXTEND_PAD:
|
||||
ss->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
|
||||
ss->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
|
||||
ss->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP;
|
||||
break;
|
||||
case SAMPLER_EXTEND_REFLECT:
|
||||
ss->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_MIRROR;
|
||||
ss->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_MIRROR;
|
||||
ss->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_MIRROR;
|
||||
break;
|
||||
}
|
||||
|
||||
return batch_offset(ss);
|
||||
}
|
||||
|
||||
static void gen6_emit_vertex_buffer(void)
|
||||
{
|
||||
OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | 3);
|
||||
OUT_BATCH(VB0_VERTEXDATA |
|
||||
0 << VB0_BUFFER_INDEX_SHIFT |
|
||||
VERTEX_SIZE << VB0_BUFFER_PITCH_SHIFT);
|
||||
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, 0);
|
||||
OUT_RELOC(batch->bo, I915_GEM_DOMAIN_VERTEX, 0, batch->bo->size-1);
|
||||
OUT_BATCH(0);
|
||||
}
|
||||
|
||||
static uint32_t gen6_emit_primitive(void)
|
||||
{
|
||||
uint32_t offset;
|
||||
|
||||
OUT_BATCH(GEN6_3DPRIMITIVE |
|
||||
GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL |
|
||||
_3DPRIM_RECTLIST << GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT |
|
||||
0 << 9 |
|
||||
4);
|
||||
OUT_BATCH(3); /* vertex count */
|
||||
offset = batch_used();
|
||||
OUT_BATCH(0); /* vertex_index */
|
||||
OUT_BATCH(1); /* single instance */
|
||||
OUT_BATCH(0); /* start instance location */
|
||||
OUT_BATCH(0); /* index buffer offset, ignored */
|
||||
|
||||
return offset;
|
||||
}
|
||||
|
||||
void gen6_render_copyfunc(struct scratch_buf *src, unsigned src_x, unsigned src_y,
|
||||
struct scratch_buf *dst, unsigned dst_x, unsigned dst_y,
|
||||
unsigned logical_tile_no)
|
||||
{
|
||||
uint32_t wm_state, wm_kernel, wm_table;
|
||||
uint32_t cc_vp, cc_blend, offset;
|
||||
uint32_t batch_end;
|
||||
|
||||
intel_batchbuffer_flush(batch);
|
||||
|
||||
batch->ptr = batch->buffer + 1024;
|
||||
batch_alloc(64, 64);
|
||||
wm_table = gen6_bind_surfaces(src, dst);
|
||||
wm_kernel = gen6_create_kernel();
|
||||
wm_state = gen6_create_sampler(SAMPLER_FILTER_NEAREST,
|
||||
SAMPLER_EXTEND_NONE);
|
||||
|
||||
cc_vp = gen6_create_cc_viewport();
|
||||
cc_blend = gen6_create_cc_blend();
|
||||
|
||||
batch->ptr = batch->buffer;
|
||||
|
||||
gen6_emit_invariant();
|
||||
gen6_emit_state_base_address();
|
||||
|
||||
gen6_emit_sip();
|
||||
gen6_emit_urb();
|
||||
|
||||
gen6_emit_viewports(cc_vp);
|
||||
gen6_emit_vs();
|
||||
gen6_emit_gs();
|
||||
gen6_emit_clip();
|
||||
gen6_emit_wm_constants();
|
||||
gen6_emit_null_depth_buffer();
|
||||
|
||||
gen6_emit_drawing_rectangle(dst);
|
||||
gen6_emit_cc(cc_blend);
|
||||
gen6_emit_sampler(wm_state);
|
||||
gen6_emit_sf();
|
||||
gen6_emit_wm(wm_kernel);
|
||||
gen6_emit_vertex_elements();
|
||||
gen6_emit_binding_table(wm_table);
|
||||
|
||||
gen6_emit_vertex_buffer();
|
||||
offset = gen6_emit_primitive();
|
||||
|
||||
OUT_BATCH(MI_BATCH_BUFFER_END);
|
||||
batch_end = batch_align(8);
|
||||
|
||||
*(uint32_t*)(batch->buffer + offset) =
|
||||
batch_round_upto(VERTEX_SIZE)/VERTEX_SIZE;
|
||||
|
||||
emit_vertex_2s(dst_x + TILE_SIZE, dst_y + TILE_SIZE);
|
||||
emit_vertex_normalized(src_x + TILE_SIZE, buf_width(src));
|
||||
emit_vertex_normalized(src_y + TILE_SIZE, buf_height(src));
|
||||
|
||||
emit_vertex_2s(dst_x, dst_y + TILE_SIZE);
|
||||
emit_vertex_normalized(src_x, buf_width(src));
|
||||
emit_vertex_normalized(src_y + TILE_SIZE, buf_height(src));
|
||||
|
||||
emit_vertex_2s(dst_x, dst_y);
|
||||
emit_vertex_normalized(src_x, buf_width(src));
|
||||
emit_vertex_normalized(src_y, buf_height(src));
|
||||
|
||||
gen6_render_flush(batch_end);
|
||||
intel_batchbuffer_reset(batch);
|
||||
}
|
||||
1547
tests/gen6_render.h
Normal file
1547
tests/gen6_render.h
Normal file
File diff suppressed because it is too large
Load Diff
Loading…
x
Reference in New Issue
Block a user