diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
index 42ab1408..afd68140 100644
--- a/tools/quick_dump/Makefile.am
+++ b/tools/quick_dump/Makefile.am
@@ -11,7 +11,8 @@ I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c \
 			       $(top_srcdir)/lib/intel_drm.c  \
 			       $(top_srcdir)/lib/intel_pci.c  \
 			       $(top_srcdir)/lib/intel_reg_map.c  \
-			       $(top_srcdir)/lib/intel_mmio.c
+			       $(top_srcdir)/lib/intel_mmio.c  \
+			       $(top_srcdir)/lib/intel_dpio.c
 
 chipset_wrap_python.c chipset.py: chipset.i
 	$(SWIG) $(AX_SWIG_PYTHON_OPT) -I/usr/include -I$(top_srcdir)/lib -o $@ $<
diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
index 36e7f4cd..0a15d388 100644
--- a/tools/quick_dump/chipset.i
+++ b/tools/quick_dump/chipset.i
@@ -14,6 +14,7 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
 extern void intel_register_access_fini();
 extern int intel_register_access_needs_wake();
 extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
+extern uint32_t intel_dpio_reg_read(uint32_t reg);
 %}
 
 extern int is_sandybridge(unsigned short pciid);
@@ -26,3 +27,4 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
 extern void intel_register_access_fini();
 extern int intel_register_access_needs_wake();
 extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
+extern uint32_t intel_dpio_reg_read(uint32_t reg);
diff --git a/tools/quick_dump/reg_access.py b/tools/quick_dump/reg_access.py
index b7f3100d..e2a0a957 100755
--- a/tools/quick_dump/reg_access.py
+++ b/tools/quick_dump/reg_access.py
@@ -27,6 +27,12 @@ def get_wake():
 	mt_forcewake_get()
 	vlv_forcewake_get()
 
+def dpio_read(reg):
+	reg = int(reg, 16)
+	val = chipset.intel_dpio_reg_read(reg)
+	return val
+
+
 def init():
 	pci_dev = chipset.intel_get_pci_device()
 	ret = chipset.intel_register_access_init(pci_dev, 0)