flywithu/ntel-gpu-tools
1
0
Fork 0
mirror of https://github.com/tiagovignatti/intel-gpu-tools.git synced 2025-06-09 00:46:17 +00:00
Code Issues Releases Wiki Activity

assembler: ExecSize can be as big as 32 channels

Browse Source 
See the IVB PRM, vol4 part3 5.2.3.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2013-01-25 15:12:12 +00:00
parent c0592b2882
commit 6e83eb66b1
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
assembler/brw_eu_emit.c
View File

@ -163,7 +163,7 @@ validate_reg(struct brw_instruction *insn, struct brw_reg reg)
int hstride_for_reg[] = {0, 1, 2, 4}; int hstride_for_reg[] = {0, 1, 2, 4};
int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256};
int width_for_reg[] = {1, 2, 4, 8, 16}; int width_for_reg[] = {1, 2, 4, 8, 16};
int execsize_for_reg[] = {1, 2, 4, 8, 16}; int execsize_for_reg[] = {1, 2, 4, 8, 16, 32};
int width, hstride, vstride, execsize; int width, hstride, vstride, execsize;
if (reg.file == BRW_IMMEDIATE_VALUE) { if (reg.file == BRW_IMMEDIATE_VALUE) {