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igt/gem_workarounds: Convert to real GPU hang injection

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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2015-12-11 21:34:42 +00:00
parent 6f7372f664
commit 6b3c832cfb
1 changed files with 31 additions and 88 deletions
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119
tests/gem_workarounds.c
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@ -27,25 +27,11 @@
#define _GNU_SOURCE #define _GNU_SOURCE
#include "igt.h" #include "igt.h"
#include <stdbool.h>
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <sys/mman.h>
#include <time.h>
#include <signal.h>
enum operation { enum operation {
GPU_RESET = 0x01, GPU_RESET,
SUSPEND_RESUME = 0x02, SUSPEND_RESUME,
SIMPLE_READ = 0x03, SIMPLE_READ,
}; };
struct intel_wa_reg { struct intel_wa_reg {
@ -54,57 +40,21 @@ struct intel_wa_reg {
uint32_t mask; uint32_t mask;
}; };
static int drm_fd;
static uint32_t devid;
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
static int num_wa_regs;
static struct intel_wa_reg *wa_regs; static struct intel_wa_reg *wa_regs;
static int num_wa_regs;
static void wait_gpu(void) static void wait_gpu(void)
{ {
struct drm_i915_gem_execbuffer2 execbuf; int fd = drm_open_driver(DRIVER_INTEL);
struct drm_i915_gem_exec_object2 gem_exec; gem_quiescent_gpu(fd);
uint32_t b[2] = {MI_BATCH_BUFFER_END}; close(fd);
memset(&gem_exec, 0, sizeof(gem_exec));
gem_exec.handle = gem_create(drm_fd, 4096);
gem_write(drm_fd, gem_exec.handle, 0, b, sizeof(b));
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = (uintptr_t)&gem_exec;
execbuf.buffer_count = 1;
execbuf.batch_len = sizeof(b);
drmIoctl(drm_fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
gem_sync(drm_fd, gem_exec.handle);
gem_close(drm_fd, gem_exec.handle);
} }
static void test_hang_gpu(void) static void test_hang_gpu(void)
{ {
int retry_count = 30; int fd = drm_open_driver(DRIVER_INTEL);
enum stop_ring_flags flags; igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT));
close(fd);
igt_assert(retry_count);
igt_set_stop_rings(STOP_RING_DEFAULTS);
wait_gpu();
while(retry_count--) {
flags = igt_get_stop_rings();
if (flags == 0)
break;
igt_info("gpu hang not yet cleared, retries left %d\n", retry_count);
sleep(1);
}
flags = igt_get_stop_rings();
if (flags)
igt_set_stop_rings(STOP_RING_NONE);
} }
static void test_suspend_resume(void) static void test_suspend_resume(void)
@ -117,8 +67,6 @@ static int workaround_fail_count(void)
{ {
int i, fail_count = 0; int i, fail_count = 0;
intel_register_access_init(intel_get_pci_device(), 0);
/* There is a small delay after coming ot of rc6 to the correct /* There is a small delay after coming ot of rc6 to the correct
render context values will get loaded by hardware (bdw,chv). render context values will get loaded by hardware (bdw,chv).
This here ensures that we have the correct context loaded before This here ensures that we have the correct context loaded before
@ -145,8 +93,6 @@ static int workaround_fail_count(void)
} }
} }
intel_register_access_fini();
return fail_count; return fail_count;
} }
@ -176,48 +122,44 @@ static void check_workarounds(enum operation op)
igt_main igt_main
{ {
igt_fixture { igt_fixture {
int i; struct pci_device *pci_dev;
int fd;
int ret;
FILE *file; FILE *file;
char *line = NULL; char *line = NULL;
size_t line_size; size_t line_size;
int i;
drm_fd = drm_open_driver(DRIVER_INTEL); pci_dev = intel_get_pci_device();
igt_require(pci_dev);
bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096); intel_register_access_init(pci_dev, 0);
devid = intel_get_drm_devid(drm_fd);
batch = intel_batchbuffer_alloc(bufmgr, devid);
fd = igt_debugfs_open("i915_wa_registers", O_RDONLY); file = igt_debugfs_fopen("i915_wa_registers", "r");
igt_assert(fd >= 0); igt_assert(getline(&line, &line_size, file) > 0);
igt_debug("i915_wa_registers: %s", line);
file = fdopen(fd, "r");
igt_assert(file > 0);
ret = getline(&line, &line_size, file);
igt_assert(ret > 0);
sscanf(line, "Workarounds applied: %d", &num_wa_regs); sscanf(line, "Workarounds applied: %d", &num_wa_regs);
if (IS_BROADWELL(devid) || if (IS_BROADWELL(pci_dev->device_id) ||
IS_CHERRYVIEW(devid)) IS_CHERRYVIEW(pci_dev->device_id))
igt_assert(num_wa_regs > 0); igt_assert(num_wa_regs > 0);
else else
igt_assert(num_wa_regs >= 0); igt_assert(num_wa_regs >= 0);
wa_regs = malloc(num_wa_regs * sizeof(*wa_regs)); wa_regs = malloc(num_wa_regs * sizeof(*wa_regs));
igt_assert(wa_regs);
i = 0; i = 0;
while(getline(&line, &line_size, file) > 0) { while (getline(&line, &line_size, file) > 0) {
sscanf(line, "0x%X: 0x%08X, mask: 0x%08X", igt_debug("%s", line);
&wa_regs[i].addr, &wa_regs[i].value, igt_assert(i < num_wa_regs);
&wa_regs[i].mask); if (sscanf(line, "0x%X: 0x%08X, mask: 0x%08X",
++i; &wa_regs[i].addr,
&wa_regs[i].value,
&wa_regs[i].mask) == 3)
i++;
} }
free(line); free(line);
fclose(file); fclose(file);
close(fd);
} }
igt_subtest("read") igt_subtest("read")
@ -231,6 +173,7 @@ igt_main
igt_fixture { igt_fixture {
free(wa_regs); free(wa_regs);
close(drm_fd); intel_register_access_fini();
} }
} }