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gem_pipe_control_store_loop: BDW update

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I've opted to not use the PIPE_CONTROL w/a for now. I am unclear if it
is actually required (the test does pass).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
This commit is contained in:
Ben Widawsky
2013-12-05 14:14:35 -08:00
parent 40b586188c
commit 672911d714
3 changed files with 31 additions and 4 deletions
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lib/intel_batchbuffer.h
+15
View File
@@ -112,6 +112,21 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
} \
} while(0)
#define COLOR_BLIT_COPY_BATCH_START(devid, flags) do { \
if (intel_gen(devid) >= 8) { \
BEGIN_BATCH(8); \
OUT_BATCH(MI_NOOP); \
OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | 0x5 | \
COLOR_BLT_WRITE_ALPHA | \
XY_COLOR_BLT_WRITE_RGB); \
} else { \
BEGIN_BATCH(6); \
OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | 0x4 | \
COLOR_BLT_WRITE_ALPHA | \
XY_COLOR_BLT_WRITE_RGB); \
} \
} while(0)
#define BLIT_RELOC_UDW(devid) do { \
if (intel_gen(devid) >= 8) { \
OUT_BATCH(0); \
lib/intel_reg.h
+2 -1
View File
@@ -2709,7 +2709,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define COLOR_BLT_WRITE_ALPHA (1<<21)
#define COLOR_BLT_WRITE_RGB (1<<20)
#define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|(0x4))
#define XY_COLOR_BLT_CMD_NOLEN ((2<<29)|(0x50<<22))
#define XY_COLOR_BLT_CMD (XY_COLOR_BLT_CMD_NOLEN|(0x4))
#define XY_COLOR_BLT_WRITE_ALPHA (1<<21)
#define XY_COLOR_BLT_WRITE_RGB (1<<20)
#define XY_COLOR_BLT_TILED (1<<11)