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https://github.com/tiagovignatti/intel-gpu-tools.git
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tools: Add an intel_firmware_decode tool
So we can inspect fw headers. Sample output:
Firmware: skl_dmc_ver1_18.bin (7892 bytes)
CSS header (128 bytes)
module_type: DMC (9)
header_len: 32
header_ver: 0x10000
module_id: 0x0
module_vendor: 0x0
date: 0x7df060c
size: 1973
key_size: 0
modulus_size: 0
exponent_size: 0
version: 1.18 (0x10012)
kernel_header_info: 0x0
Package header (256 bytes)
header_len: 64
header_ver: 1
num_entries: 3
Firmware #1
stepping: A.*
offset: 4294967295
Firmware #2
stepping: B.*
offset: 4294967295
Firmware #3
stepping: *.*
offset: 0
0x7f0867143000
0x7f0867143180
signature: 0x40403e3e
header_len: 128
header_ver: 1
dmcc_ver: 520
project: 0x900
fw_size: 1845
fw_version: 0x10008
mmio_count: 3
write(0x0008f074, 0x00002fc0)
write(0x0008f004, 0x02500204)
write(0x0008f034, 0xc003b400)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau
parent
ad411e2d5d
commit
669b5da2bc
1
tools/.gitignore
vendored
1
tools/.gitignore
vendored
@ -10,6 +10,7 @@ intel_dump_decode
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intel_error_decode
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intel_forcewaked
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intel_framebuffer_dump
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intel_firmware_decode
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intel_gpu_frequency
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intel_gpu_time
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intel_gpu_top
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@ -17,6 +17,7 @@ bin_PROGRAMS = \
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intel_forcewaked \
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intel_gpu_frequency \
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intel_framebuffer_dump \
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intel_firmware_decode \
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intel_gpu_time \
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intel_gpu_top \
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intel_gtt \
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287
tools/intel_firmware_decode.c
Normal file
287
tools/intel_firmware_decode.c
Normal file
@ -0,0 +1,287 @@
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/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Damien Lespiau <damien.lespiau@intel.com>
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*/
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/mman.h>
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#include <sys/stat.h>
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#include "igt_core.h"
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#define __packed __attribute__((packed))
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struct intel_css_header {
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/* 0x09 for DMC */
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uint32_t module_type;
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/* Includes the DMC specific header in dwords */
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uint32_t header_len;
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/* always value would be 0x10000 */
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uint32_t header_ver;
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/* Not used */
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uint32_t module_id;
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/* Not used */
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uint32_t module_vendor;
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/* in YYYYMMDD format */
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uint32_t date;
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/* Size in dwords (CSS_Headerlen + PackageHeaderLen + dmc FWsLen)/4 */
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uint32_t size;
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/* Not used */
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uint32_t key_size;
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/* Not used */
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uint32_t modulus_size;
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/* Not used */
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uint32_t exponent_size;
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/* Not used */
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uint32_t reserved1[12];
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/* Major Minor */
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uint32_t version;
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/* Not used */
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uint32_t reserved2[8];
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/* Not used */
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uint32_t kernel_header_info;
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} __packed;
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struct intel_fw_info {
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uint16_t reserved1;
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/* Stepping (A, B, C, ..., *). * is a wildcard */
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char stepping;
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/* Sub-stepping (0, 1, ..., *). * is a wildcard */
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char substepping;
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uint32_t offset;
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uint32_t reserved2;
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} __packed;
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struct intel_package_header {
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/* DMC container header length in dwords */
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unsigned char header_len;
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/* always value would be 0x01 */
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unsigned char header_ver;
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unsigned char reserved[10];
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/* Number of valid entries in the FWInfo array below */
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uint32_t num_entries;
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struct intel_fw_info fw_info[20];
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} __packed;
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struct intel_dmc_header {
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/* always value would be 0x40403E3E */
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uint32_t signature;
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/* DMC binary header length */
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unsigned char header_len;
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/* 0x01 */
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unsigned char header_ver;
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/* Reserved */
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uint16_t dmcc_ver;
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/* Major, Minor */
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uint32_t project;
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/* Firmware program size (excluding header) in dwords */
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uint32_t fw_size;
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/* Major Minor version */
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uint32_t fw_version;
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/* Number of valid MMIO cycles present. */
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uint32_t mmio_count;
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/* MMIO address */
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uint32_t mmioaddr[8];
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/* MMIO data */
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uint32_t mmiodata[8];
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/* FW filename */
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unsigned char dfile[32];
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uint32_t reserved1[2];
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} __packed;
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typedef struct {
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int fd;
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uint8_t *base;
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struct intel_css_header *css_header;
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struct intel_package_header *package_header;
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} csr_t;
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static void csr_open(csr_t *ctx, const char *filename)
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{
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struct stat st;
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ctx->fd = open(filename, O_RDWR);
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igt_fail_on_f(ctx->fd == -1, "Couldn't open %s\n", filename);
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fstat(ctx->fd, &st);
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ctx->base = mmap(NULL, st.st_size, PROT_READ | PROT_WRITE, MAP_PRIVATE,
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ctx->fd, 0);
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igt_fail_on_f(ctx->base == MAP_FAILED, "Couldn't mmap %s\n", filename);
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printf("Firmware: %s (%zd bytes)\n", filename, st.st_size);
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ctx->css_header = (struct intel_css_header *)ctx->base;
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ctx->package_header = (struct intel_package_header *)
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(ctx->base + sizeof(*ctx->css_header));
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}
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#define print_d32(p, field) \
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printf(" "#field": %u\n", (p)->field)
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#define print_x32(p, field) \
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printf(" "#field": 0x%x\n", (p)->field)
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#define print_s(p, field) \
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printf(" "#field": %s\n", (p)->field)
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static const char *module_type_name(uint32_t module_type)
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{
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switch (module_type) {
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case 0x9:
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return "DMC";
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default:
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return "Unknown";
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}
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}
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static void dump_css(csr_t *ctx)
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{
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struct intel_css_header *css = ctx->css_header;
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printf("CSS header (%zd bytes)\n", sizeof(*css));
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printf(" module_type: %s (%d)\n", module_type_name(css->module_type),
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css->module_type);
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print_d32(css, header_len);
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print_x32(css, header_ver);
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print_x32(css, module_id);
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print_x32(css, module_vendor);
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print_x32(css, date);
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print_d32(css, size);
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print_d32(css, key_size);
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print_d32(css, modulus_size);
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print_d32(css, exponent_size);
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/* uint32_t reserved1[12]; */
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printf(" version: %d.%d (0x%x)\n", css->version >> 16,
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css->version & 0xffff, css->version);
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/* uint32_t reserved2[8]; */
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print_x32(css, kernel_header_info);
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}
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static void dump_dmc(csr_t *ctx, struct intel_fw_info *info)
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{
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struct intel_dmc_header *dmc;
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unsigned int i;
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if (info->offset == 0xffffffff)
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return;
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dmc = (struct intel_dmc_header *)(ctx->base + sizeof(*ctx->css_header)
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+ sizeof(*ctx->package_header) +
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info->offset);
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print_x32(dmc, signature);
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print_d32(dmc, header_len);
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print_d32(dmc, header_ver);
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print_d32(dmc, dmcc_ver);
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print_x32(dmc, project);
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print_d32(dmc, fw_size);
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print_x32(dmc, fw_version);
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print_d32(dmc, mmio_count);
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for (i = 0; i < dmc->mmio_count; i++) {
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printf(" write(0x%08x, 0x%08x)\n", dmc->mmioaddr[i],
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dmc->mmiodata[i]);
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}
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}
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static void dump_package(csr_t *ctx)
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{
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struct intel_package_header *package = ctx->package_header;
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unsigned int i;
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printf("Package header (%zd bytes)\n", sizeof(*package));
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print_d32(package, header_len);
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print_d32(package, header_ver);
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/* unsigned char reserved[10]; */
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print_d32(package, num_entries);
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for (i = 0; i < package->num_entries; i++) {
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struct intel_fw_info *info = &package->fw_info[i];
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printf("Firmware #%d\n", i + 1);
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printf(" stepping: %c.%c\n", info->stepping,
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info->substepping);
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print_d32(info, offset);
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dump_dmc(ctx, info);
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}
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}
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static void csr_dump(csr_t *ctx)
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{
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dump_css(ctx);
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dump_package(ctx);
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}
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static csr_t ctx;
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int main(int argc, char **argv)
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{
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if (argc != 2) {
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fprintf(stderr, "Usage: %s firmware.bin\n", argv[0]);
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return 1;
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}
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csr_open(&ctx, argv[1]);
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csr_dump(&ctx);
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return 0;
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}
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