mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-10 17:36:11 +00:00
igt/gem_concurent_blit: Exercise different object sizes
Searching for coherency problems that may arise with smaller-then-cache/large-then-cache objects. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
parent
95090bb50b
commit
5d669bf1dd
@ -63,16 +63,22 @@ struct create {
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drm_intel_bo *(*create)(drm_intel_bufmgr *, uint64_t size);
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};
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struct size {
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const char *name;
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int width, height;
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};
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struct buffers {
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const char *name;
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const struct create *create;
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const struct access_mode *mode;
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const struct size *size;
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drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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drm_intel_bo **src, **dst;
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drm_intel_bo *snoop, *spare;
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uint32_t *tmp;
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int width, height, size;
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int width, height, npixels;
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int count, num_buffers;
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unsigned allow_mem;
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};
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@ -90,9 +96,9 @@ nop_release_bo(drm_intel_bo *bo)
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static void
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prw_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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{
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for (int i = 0; i < b->size; i++)
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for (int i = 0; i < b->npixels; i++)
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b->tmp[i] = val;
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drm_intel_bo_subdata(bo, 0, 4*b->size, b->tmp);
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drm_intel_bo_subdata(bo, 0, 4*b->npixels, b->tmp);
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}
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static void
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@ -101,8 +107,8 @@ prw_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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uint32_t *vaddr;
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vaddr = b->tmp;
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do_or_die(drm_intel_bo_get_subdata(bo, 0, 4*b->size, vaddr));
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for (int i = 0; i < b->size; i++)
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do_or_die(drm_intel_bo_get_subdata(bo, 0, 4*b->npixels, vaddr));
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for (int i = 0; i < b->npixels; i++)
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igt_assert_eq_u32(vaddr[i], val);
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}
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@ -195,7 +201,7 @@ static void create_cpu_require(const struct create *create)
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static drm_intel_bo *
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unmapped_create_bo(const struct buffers *b)
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{
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return b->create->create(b->bufmgr, 4*b->size);
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return b->create->create(b->bufmgr, 4*b->npixels);
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}
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static void create_snoop_require(const struct create *create)
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@ -250,7 +256,7 @@ userptr_create_bo(const struct buffers *b)
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void *ptr;
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memset(&userptr, 0, sizeof(userptr));
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userptr.user_size = b->size * 4;
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userptr.user_size = b->npixels * 4;
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userptr.user_size = (userptr.user_size + 4095) & -4096;
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ptr = mmap(NULL, userptr.user_size,
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@ -269,7 +275,7 @@ userptr_create_bo(const struct buffers *b)
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static void
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userptr_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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{
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int size = b->size;
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int size = b->npixels;
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uint32_t *vaddr = bo->virtual;
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gem_set_domain(fd, bo->handle,
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@ -281,7 +287,7 @@ userptr_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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static void
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userptr_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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{
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int size = b->size;
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int size = b->npixels;
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uint32_t *vaddr = bo->virtual;
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gem_set_domain(fd, bo->handle,
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@ -341,7 +347,7 @@ dmabuf_create_bo(const struct buffers *b)
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struct dmabuf *dmabuf;
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int size;
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size = 4*b->size;
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size = 4*b->npixels;
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size = (size + 4095) & -4096;
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memset(&args, 0, sizeof(args));
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@ -377,7 +383,7 @@ dmabuf_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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int size;
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prime_sync_start(dmabuf->fd, true);
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for (v = dmabuf->map, size = b->size; size--; v++)
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for (v = dmabuf->map, size = b->npixels; size--; v++)
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*v = val;
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prime_sync_end(dmabuf->fd, true);
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}
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@ -390,7 +396,7 @@ dmabuf_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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int size;
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prime_sync_start(dmabuf->fd, false);
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for (v = dmabuf->map, size = b->size; size--; v++)
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for (v = dmabuf->map, size = b->npixels; size--; v++)
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igt_assert_eq_u32(*v, val);
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prime_sync_end(dmabuf->fd, false);
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}
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@ -413,7 +419,7 @@ static void
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gtt_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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{
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uint32_t *vaddr = bo->virtual;
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int size = b->size;
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int size = b->npixels;
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drm_intel_gem_bo_start_gtt_access(bo, true);
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while (size--)
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@ -465,15 +471,45 @@ gttX_create_bo(const struct buffers *b)
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return tile_bo(gtt_create_bo(b), b->width);
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}
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static void bit17_require(void)
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{
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static struct drm_i915_gem_get_tiling2 {
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uint32_t handle;
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uint32_t tiling_mode;
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uint32_t swizzle_mode;
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uint32_t phys_swizzle_mode;
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} arg;
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#define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2)
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if (arg.handle == 0) {
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arg.handle = gem_create(fd, 4096);
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gem_set_tiling(fd, arg.handle, I915_TILING_X, 512);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg);
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gem_close(fd, arg.handle);
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}
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igt_require(arg.phys_swizzle_mode == arg.swizzle_mode);
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}
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static void wc_require(void)
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{
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bit17_require();
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gem_require_mmap_wc(fd);
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}
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static void
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wc_create_require(const struct create *create)
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{
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wc_require();
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}
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static drm_intel_bo *
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wc_create_bo(const struct buffers *b)
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{
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drm_intel_bo *bo;
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gem_require_mmap_wc(fd);
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bo = unmapped_create_bo(b);
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bo->virtual = __gem_mmap__wc(fd, bo->handle, 0, bo->size, PROT_READ | PROT_WRITE);
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bo->virtual = gem_mmap__wc(fd, bo->handle, 0, bo->size, PROT_READ | PROT_WRITE);
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return bo;
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}
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@ -503,7 +539,7 @@ gpuX_create_bo(const struct buffers *b)
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static void
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cpu_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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{
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int size = b->size;
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int size = b->npixels;
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uint32_t *vaddr;
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do_or_die(drm_intel_bo_map(bo, true));
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@ -516,7 +552,7 @@ cpu_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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static void
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cpu_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
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{
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int size = b->size;
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int size = b->npixels;
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uint32_t *vaddr;
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do_or_die(drm_intel_bo_map(bo, false));
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@ -661,6 +697,7 @@ const struct access_mode {
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},
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{
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.name = "wc",
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.require = wc_create_require,
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.create_bo = wc_create_bo,
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.set_bo = gtt_set_bo,
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.cmp_bo = gtt_cmp_bo,
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@ -684,29 +721,64 @@ const struct access_mode {
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igt_render_copyfunc_t rendercopy;
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static int read_sysctl(const char *path)
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{
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FILE *file = fopen(path, "r");
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int max = 0;
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if (file) {
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fscanf(file, "%d", &max);
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fclose(file);
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}
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return max;
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}
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static int write_sysctl(const char *path, int value)
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{
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FILE *file = fopen(path, "w");
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if (file) {
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fprintf(file, "%d", value);
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fclose(file);
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}
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return read_sysctl(path);
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}
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static bool set_max_map_count(int num_buffers)
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{
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int max = read_sysctl("/proc/sys/vm/max_map_count");
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if (max < num_buffers + 1024)
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max = write_sysctl("/proc/sys/vm/max_map_count",
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num_buffers + 1024);
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return max > num_buffers;
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}
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static void buffers_init(struct buffers *b,
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const char *name,
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const struct create *create,
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const struct access_mode *mode,
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const struct size *size,
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int num_buffers,
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int width, int height,
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unsigned allow_mem,
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int _fd, int enable_reuse)
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{
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igt_debug("%s: using 2x%d buffers, each 1MiB\n", name, num_buffers);
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igt_require(num_buffers);
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igt_debug("%s: using 2x%d buffers, each %s\n",
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name, num_buffers, size->name);
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igt_require(set_max_map_count(2*num_buffers));
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memset(b, 0, sizeof(*b));
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b->name = name;
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b->create = create;
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b->mode = mode;
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b->size = size;
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b->num_buffers = num_buffers;
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b->allow_mem = allow_mem;
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b->count = 0;
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b->width = width;
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b->height = height;
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b->size = width * height;
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b->tmp = malloc(4*b->size);
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b->width = size->width;
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b->height = size->height;
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b->npixels = size->width * size->height;
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b->tmp = malloc(4*b->npixels);
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igt_assert(b->tmp);
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b->bufmgr = drm_intel_bufmgr_gem_init(_fd, 4096);
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@ -748,7 +820,7 @@ static void buffers_create(struct buffers *b)
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if (b->mode->require)
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b->mode->require(b->create);
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intel_require_memory(2*count, 4*b->size, b->allow_mem);
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intel_require_memory(2*count, 4*b->npixels, b->allow_mem);
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buffers_destroy(b);
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igt_assert(b->count == 0);
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@ -785,13 +857,13 @@ static void render_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *s
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{
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struct igt_buf d = {
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.bo = dst,
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.size = b->size * 4,
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.num_tiles = b->size * 4,
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.size = b->npixels * 4,
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.num_tiles = b->npixels * 4,
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.stride = b->width * 4,
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}, s = {
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.bo = src,
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.size = b->size * 4,
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.num_tiles = b->size * 4,
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.size = b->npixels * 4,
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.num_tiles = b->npixels * 4,
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.stride = b->width * 4,
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};
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uint32_t swizzle;
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@ -815,7 +887,7 @@ static void blt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
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static void cpu_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
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{
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const int size = b->size * sizeof(uint32_t);
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const int size = b->npixels * sizeof(uint32_t);
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void *d, *s;
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gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_CPU, 0);
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@ -831,7 +903,7 @@ static void cpu_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
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static void gtt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
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{
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const int size = b->size * sizeof(uint32_t);
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const int size = b->npixels * sizeof(uint32_t);
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void *d, *s;
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gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_GTT, 0);
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@ -1286,9 +1358,7 @@ static void __run_forked(struct buffers *buffers,
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fd = drm_open_driver(DRIVER_INTEL);
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buffers_init(buffers, buffers->name,
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buffers->create, buffers->mode,
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_num_buffers,
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buffers->width, buffers->height,
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buffers->allow_mem,
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buffers->size, _num_buffers, buffers->allow_mem,
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fd, true);
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buffers_create(buffers);
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@ -1319,25 +1389,6 @@ static void run_bomb(struct buffers *buffers,
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do_test_func, do_copy_func, do_hang_func);
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}
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static void bit17_require(void)
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{
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struct drm_i915_gem_get_tiling2 {
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uint32_t handle;
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uint32_t tiling_mode;
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uint32_t swizzle_mode;
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uint32_t phys_swizzle_mode;
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} arg;
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#define DRM_IOCTL_I915_GEM_GET_TILING2 DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling2)
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memset(&arg, 0, sizeof(arg));
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arg.handle = gem_create(fd, 4096);
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gem_set_tiling(fd, arg.handle, I915_TILING_X, 512);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_TILING2, &arg);
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gem_close(fd, arg.handle);
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igt_require(arg.phys_swizzle_mode == arg.swizzle_mode);
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}
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static void cpu_require(void)
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{
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bit17_require();
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@ -1347,12 +1398,6 @@ static void gtt_require(void)
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{
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}
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static void wc_require(void)
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{
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bit17_require();
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gem_require_mmap_wc(fd);
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}
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static void bcs_require(void)
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{
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}
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@ -1366,6 +1411,7 @@ static void
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run_basic_modes(const char *prefix,
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const struct create *create,
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const struct access_mode *mode,
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const struct size *size,
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const int num_buffers,
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const unsigned allow_mem,
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const char *suffix,
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@ -1402,9 +1448,8 @@ run_basic_modes(const char *prefix,
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igt_fixture
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buffers_init(&buffers, prefix, create, mode,
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num_buffers, 512, 512, allow_mem,
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fd,
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run_wrap_func != run_child);
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size, num_buffers, allow_mem,
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fd, run_wrap_func != run_child);
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igt_subtest_f("%s-%s-%s-sanitycheck0%s%s", prefix, mode->name, p->prefix, suffix, h->suffix) {
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p->require();
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@ -1557,20 +1602,21 @@ static void
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run_modes(const char *style,
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const struct create *create,
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const struct access_mode *mode,
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const int num_buffers,
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const struct size *size,
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const int num,
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unsigned allow_mem)
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{
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run_basic_modes(style, create, mode, num_buffers, allow_mem,
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run_basic_modes(style, create, mode, size, num, allow_mem,
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"", run_single);
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run_basic_modes(style, create, mode, num_buffers, allow_mem,
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run_basic_modes(style, create, mode, size, num, allow_mem,
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"-child", run_child);
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run_basic_modes(style, create, mode, num_buffers, allow_mem,
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run_basic_modes(style, create, mode, size, num, allow_mem,
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"-forked", run_forked);
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igt_fork_signal_helper();
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run_basic_modes(style, create, mode, num_buffers, allow_mem,
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run_basic_modes(style, create, mode, size, num, allow_mem,
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"-interruptible", run_interruptible);
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run_basic_modes(style, create, mode, num_buffers, allow_mem,
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run_basic_modes(style, create, mode, size, num, allow_mem,
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"-bomb", run_bomb);
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igt_stop_signal_helper();
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}
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@ -1587,6 +1633,13 @@ igt_main
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#endif
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{ NULL, NULL }
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}, *c;
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const struct size sizes[] = {
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{ "4KiB", 128, 8 },
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{ "256KiB", 128, 128 },
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{ "1MiB", 512, 512 },
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{ "16MiB", 2048, 2048 },
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{ NULL}
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}, *s;
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uint64_t pin_sz = 0;
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void *pinned = NULL;
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int num_buffers = 0;
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@ -1606,76 +1659,85 @@ igt_main
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}
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for (c = create; c->name; c++) {
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char name[80];
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for (s = sizes; s->name; s++) {
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char name[80];
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int size = s->width * s->height * 4;
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num_buffers = MIN_BUFFERS;
|
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snprintf(name, sizeof(name), "%s%s", c->name, "tiny");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
num_buffers, CHECK_RAM);
|
||||
num_buffers = MIN_BUFFERS;
|
||||
snprintf(name, sizeof(name), "%s%s-%s",
|
||||
c->name, s->name, "tiny");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
s, num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
num_buffers = gem_mappable_aperture_size() / (1024 * 1024) / 4;
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s", c->name, "small");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
num_buffers = gem_mappable_aperture_size() / (1024 * 1024);
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s", c->name, "thrash");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
num_buffers = gem_global_aperture_size(fd) / (1024 * 1024);
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s", c->name, "global");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
num_buffers = gem_aperture_size(fd) / (1024 * 1024);
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s", c->name, "full");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
num_buffers = gem_mappable_aperture_size() / (1024 * 1024);
|
||||
pin_sz = intel_get_avail_ram_mb() - num_buffers;
|
||||
|
||||
igt_debug("Pinning %lld MiB\n", (long long)pin_sz);
|
||||
pin_sz *= 1024 * 1024;
|
||||
|
||||
if (posix_memalign(&pinned, 4096, pin_sz) ||
|
||||
mlock(pinned, pin_sz) ||
|
||||
madvise(pinned, pin_sz, MADV_DONTFORK)) {
|
||||
free(pinned);
|
||||
pinned = NULL;
|
||||
igt_fixture {
|
||||
num_buffers = gem_mappable_aperture_size() / size / 4;
|
||||
}
|
||||
igt_require(pinned);
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s", c->name, "swap");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
num_buffers, CHECK_RAM | CHECK_SWAP);
|
||||
snprintf(name, sizeof(name), "%s%s-%s",
|
||||
c->name, s->name, "small");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
s, num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
if (pinned) {
|
||||
munlock(pinned, pin_sz);
|
||||
free(pinned);
|
||||
pinned = NULL;
|
||||
igt_fixture {
|
||||
num_buffers = gem_mappable_aperture_size() / size;
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s-%s",
|
||||
c->name, s->name, "thrash");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
s, num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
num_buffers = gem_global_aperture_size(fd) / size;
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s-%s",
|
||||
c->name, s->name, "global");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
s, num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
num_buffers = gem_aperture_size(fd) / size;
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s-%s",
|
||||
c->name, s->name, "full");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
s, num_buffers, CHECK_RAM);
|
||||
|
||||
igt_fixture {
|
||||
num_buffers = gem_mappable_aperture_size() / size;
|
||||
pin_sz = intel_get_avail_ram_mb() - gem_mappable_aperture_size()/(1024*1024);
|
||||
|
||||
igt_debug("Pinning %lld MiB\n", (long long)pin_sz);
|
||||
pin_sz *= 1024 * 1024;
|
||||
|
||||
if (posix_memalign(&pinned, 4096, pin_sz) ||
|
||||
mlock(pinned, pin_sz) ||
|
||||
madvise(pinned, pin_sz, MADV_DONTFORK)) {
|
||||
free(pinned);
|
||||
pinned = NULL;
|
||||
}
|
||||
igt_require(pinned);
|
||||
}
|
||||
|
||||
snprintf(name, sizeof(name), "%s%s-%s",
|
||||
c->name, s->name, "swap");
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(name, c, &access_modes[i],
|
||||
s, num_buffers, CHECK_RAM | CHECK_SWAP);
|
||||
|
||||
igt_fixture {
|
||||
if (pinned) {
|
||||
munlock(pinned, pin_sz);
|
||||
free(pinned);
|
||||
pinned = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user