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Lex the register number with the register name.

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This avoids the need for a start condition to prevent for example g1.8<0,1,0>UW
being lexed as GENREG NUMBER LANGLE etc. rather than
GENREG INTEGER DOT INTEGER LANGLE etc.
This commit is contained in:
Eric Anholt 2006-08-25 09:46:18 -07:00 committed by Damien Lespiau
parent 3d36079ae3
commit 569990bf6b
2 changed files with 46 additions and 43 deletions
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48
assembler/gram.y
View File

@ -63,7 +63,8 @@
%token <integer> ALIGN1 ALIGN16 MASK_DISABLE EOT %token <integer> ALIGN1 ALIGN16 MASK_DISABLE EOT
%token GENREG MSGREG ACCREG ADDRESSREG FLAGREG CONTROLREG IPREG %token <integer> GENREG MSGREG ACCREG ADDRESSREG
%token FLAGREG CONTROLREG IPREG
%token MOV %token MOV
%token MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2 %token MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2
@ -497,46 +498,51 @@ subregnum: DOT INTEGER
; ;
/* 1.4.5: Register files and register numbers */ /* 1.4.5: Register files and register numbers */
directgenreg: GENREG INTEGER subregnum directgenreg: GENREG subregnum
{ {
/* Returns an instruction with just the destination register /* Returns an instruction with just the destination register
* fields filled in. * fields filled in.
*/ */
$$.reg_file = BRW_GENERAL_REGISTER_FILE; $$.reg_file = BRW_GENERAL_REGISTER_FILE;
$$.reg_nr = $2; $$.reg_nr = $1;
$$.subreg_nr = $3; $$.subreg_nr = $2;
} }
directmsgreg: MSGREG INTEGER subregnum directmsgreg: MSGREG subregnum
{ {
/* Returns an instruction with just the destination register /* Returns an instruction with just the destination register
* fields filled in. * fields filled in.
*/ */
$$.reg_file = BRW_MESSAGE_REGISTER_FILE; $$.reg_file = BRW_MESSAGE_REGISTER_FILE;
$$.reg_nr = $2; $$.reg_nr = $1;
$$.subreg_nr = $3; $$.subreg_nr = $2;
} }
; ;
accreg: ACCREG INTEGER subregnum accreg: ACCREG subregnum
{
/* Returns an instruction with just the destination register
* fields filled in.
*/
if ($1 > 1) {
fprintf(stderr,
"accumulator register number %d out of range", $1);
YYERROR;
}
$$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
$$.reg_nr = BRW_ARF_ACCUMULATOR | $1;
$$.subreg_nr = $2;
}
;
addrreg: ADDRESSREG subregnum
{ {
/* Returns an instruction with just the destination register /* Returns an instruction with just the destination register
* fields filled in. * fields filled in.
*/ */
$$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE; $$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
$$.reg_nr = BRW_ARF_ACCUMULATOR | $2; $$.reg_nr = BRW_ARF_ADDRESS | $1;
$$.subreg_nr = $3; $$.subreg_nr = $2;
}
;
addrreg: ADDRESSREG INTEGER subregnum
{
/* Returns an instruction with just the destination register
* fields filled in.
*/
$$.reg_file = BRW_ARCHITECTURE_REGISTER_FILE;
$$.reg_nr = BRW_ARF_ADDRESS | $2;
$$.subreg_nr = $3;
} }
; ;

41
assembler/lex.l
View File

@ -7,7 +7,6 @@
int saved_state = INITIAL; int saved_state = INITIAL;
%} %}
%s IN_REG
%x BLOCK_COMMENT %x BLOCK_COMMENT
%% %%
@ -74,33 +73,31 @@ int saved_state = INITIAL;
"-" { return MINUS; } "-" { return MINUS; }
"(abs)" { return ABS; } "(abs)" { return ABS; }
/* XXX: this lexing of register files is shady */ "acc"[0-9]+ {
"acc" { yylval.integer = atoi(yytext + 1);
BEGIN(IN_REG);
return ACCREG; return ACCREG;
} }
"a" { "a"[0-9]+ {
BEGIN(IN_REG); yylval.integer = atoi(yytext + 1);
return ADDRESSREG; return ADDRESSREG;
} }
"m" { "m"[0-9]+ {
BEGIN(IN_REG); yylval.integer = atoi(yytext + 1);
return MSGREG; return MSGREG;
} }
"f" { "f"[0-9]+ {
BEGIN(IN_REG); yylval.integer = atoi(yytext + 1);
return FLAGREG; return FLAGREG;
} }
[gr] { [gr][0-9]+ {
BEGIN(IN_REG); yylval.integer = atoi(yytext + 1);
return GENREG; return GENREG;
} }
"cr" { "cr"[0-9]+ {
BEGIN(IN_REG); yylval.integer = atoi(yytext + 1);
return CONTROLREG; return CONTROLREG;
} }
"ip" { "ip" {
BEGIN(IN_REG);
return IPREG; return IPREG;
} }
@ -108,13 +105,13 @@ int saved_state = INITIAL;
* Lexing of register types should probably require the ":" symbol specified * Lexing of register types should probably require the ":" symbol specified
* in the BNF of the assembly, but our existing source didn't use that syntax. * in the BNF of the assembly, but our existing source didn't use that syntax.
*/ */
"UD" { BEGIN(INITIAL); return TYPE_UD; } "UD" { return TYPE_UD; }
"D" { BEGIN(INITIAL); return TYPE_D; } "D" { return TYPE_D; }
"UW" { BEGIN(INITIAL); return TYPE_UW; } "UW" { return TYPE_UW; }
"W" { BEGIN(INITIAL); return TYPE_W; } "W" { return TYPE_W; }
"UB" { BEGIN(INITIAL); return TYPE_UB; } "UB" { return TYPE_UB; }
"B" { BEGIN(INITIAL); return TYPE_B; } "B" { return TYPE_B; }
"F" { BEGIN(INITIAL); return TYPE_F; } "F" { return TYPE_F; }
"sat" { return SATURATE; } "sat" { return SATURATE; }
"align1" { return ALIGN1; } "align1" { return ALIGN1; }