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support simple expression

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Zou Nan hai 2009-10-20 14:51:04 +08:00 committed by Damien Lespiau
parent 8521146207
commit 5608d2765d
2 changed files with 25 additions and 13 deletions
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34
assembler/src/gram.y
View File

@ -80,8 +80,9 @@ void set_direct_src_operand(struct src_operand *src, struct direct_reg *reg,
%token LCURLY RCURLY %token LCURLY RCURLY
%token LSQUARE RSQUARE %token LSQUARE RSQUARE
%token COMMA %token COMMA
%token DOT %token DOT ABS
%token PLUS MINUS ABS %left PLUS MINUS
%left MULTIPLY DIVIDE
%token <integer> TYPE_UD TYPE_D TYPE_UW TYPE_W TYPE_UB TYPE_B %token <integer> TYPE_UD TYPE_D TYPE_UW TYPE_W TYPE_UB TYPE_B
%token <integer> TYPE_VF TYPE_HF TYPE_V TYPE_F %token <integer> TYPE_VF TYPE_HF TYPE_V TYPE_F
@ -120,6 +121,7 @@ void set_direct_src_operand(struct src_operand *src, struct direct_reg *reg,
%token <integer> X Y Z W %token <integer> X Y Z W
%type <integer> exp
%type <instruction> instruction unaryinstruction binaryinstruction %type <instruction> instruction unaryinstruction binaryinstruction
%type <instruction> binaryaccinstruction triinstruction sendinstruction %type <instruction> binaryaccinstruction triinstruction sendinstruction
%type <instruction> jumpinstruction branchloopinstruction elseinstruction %type <instruction> jumpinstruction branchloopinstruction elseinstruction
@ -152,7 +154,15 @@ void set_direct_src_operand(struct src_operand *src, struct direct_reg *reg,
%type <src_operand> indirectsrcoperand %type <src_operand> indirectsrcoperand
%type <src_operand> src srcimm imm32reg payload srcacc srcaccimm swizzle %type <src_operand> src srcimm imm32reg payload srcacc srcaccimm swizzle
%type <src_operand> relativelocation relativelocation2 locationstackcontrol %type <src_operand> relativelocation relativelocation2 locationstackcontrol
%% %%
exp: INTEGER { $$ = $1; }
| exp MULTIPLY exp { $$ = $1 * $3; }
| exp DIVIDE exp { if ($3) $$ = $1 / $3; else YYERROR;}
| exp PLUS exp { $$ = $1 + $3; }
| exp MINUS exp { $$ = $1 - $3; }
| MINUS exp { $$ = -$2;}
| LPAREN exp RPAREN { $$ = $2; }
ROOT: instrseq ROOT: instrseq
{ {
@ -287,8 +297,8 @@ binaryaccop: AVG | ADD | SEL | AND | OR | XOR | SHR | SHL | ASR | CMP | CMPN
triinstruction: sendinstruction triinstruction: sendinstruction
; ;
sendinstruction: predicate SEND execsize INTEGER post_dst payload msgtarget sendinstruction: predicate SEND execsize exp post_dst payload msgtarget
MSGLEN INTEGER RETURNLEN INTEGER instoptions MSGLEN exp RETURNLEN exp instoptions
{ {
/* Send instructions are messy. The first argument is the /* Send instructions are messy. The first argument is the
* post destination -- the grf register that the response * post destination -- the grf register that the response
@ -1030,12 +1040,12 @@ addrparam: addrreg immaddroffset
* from the address register in register-indirect register access. * from the address register in register-indirect register access.
*/ */
immaddroffset: /* empty */ { $$ = 0; } immaddroffset: /* empty */ { $$ = 0; }
| INTEGER | exp
; ;
/* 1.4.5: Register files and register numbers */ /* 1.4.5: Register files and register numbers */
subregnum: DOT INTEGER subregnum: DOT exp
{ {
$$ = $2; $$ = $2;
} }
@ -1324,7 +1334,7 @@ locationstackcontrol:
; ;
/* 1.4.7: Regions */ /* 1.4.7: Regions */
dstregion: LANGLE INTEGER RANGLE dstregion: LANGLE exp RANGLE
{ {
/* Returns a value for a horiz_stride field of an /* Returns a value for a horiz_stride field of an
* instruction. * instruction.
@ -1336,7 +1346,7 @@ dstregion: LANGLE INTEGER RANGLE
} }
; ;
region: LANGLE INTEGER COMMA INTEGER COMMA INTEGER RANGLE region: LANGLE exp COMMA exp COMMA exp RANGLE
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.vert_stride = ffs($2); $$.vert_stride = ffs($2);
@ -1349,7 +1359,7 @@ region: LANGLE INTEGER COMMA INTEGER COMMA INTEGER RANGLE
* a vertical stride, you use subsequent address registers to get a new base * a vertical stride, you use subsequent address registers to get a new base
* offset for the next row. * offset for the next row.
*/ */
region_wh: LANGLE INTEGER COMMA INTEGER RANGLE region_wh: LANGLE exp COMMA exp RANGLE
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.vert_stride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL; $$.vert_stride = BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL;
@ -1450,8 +1460,8 @@ writemask_w: /* empty */ { $$ = 0; }
; ;
/* 1.4.11: Immediate values */ /* 1.4.11: Immediate values */
imm32: INTEGER { $$.r = imm32_d; $$.u.d = $1; } imm32: exp { $$.r = imm32_d; $$.u.d = $1; }
| MINUS INTEGER { $$.r = imm32_d; $$.u.d = -$2; } | MINUS exp { $$.r = imm32_d; $$.u.d = -$2; }
| NUMBER { $$.r = imm32_f; $$.u.f = $1; } | NUMBER { $$.r = imm32_f; $$.u.f = $1; }
; ;
@ -1504,7 +1514,7 @@ abs: /* empty */ { $$ = 0; }
| ABS { $$ = 1; } | ABS { $$ = 1; }
; ;
execsize: LPAREN INTEGER RPAREN execsize: LPAREN exp RPAREN
{ {
/* Returns a value for the execution_size field of an /* Returns a value for the execution_size field of an
* instruction. * instruction.

4
assembler/src/lex.l
View File

@ -113,7 +113,6 @@ extern char *input_filename;
"transpose" { return TRANSPOSE; } "transpose" { return TRANSPOSE; }
"interleave" { return INTERLEAVE; } "interleave" { return INTERLEAVE; }
":" { return COLON; }
";" { return SEMICOLON; } ";" { return SEMICOLON; }
"(" { return LPAREN; } "(" { return LPAREN; }
")" { return RPAREN; } ")" { return RPAREN; }
@ -127,6 +126,9 @@ extern char *input_filename;
"." { return DOT; } "." { return DOT; }
"+" { return PLUS; } "+" { return PLUS; }
"-" { return MINUS; } "-" { return MINUS; }
"*" { return MULTIPLY;}
"/" { return DIVIDE; }
":" { return COLON; }
"(abs)" { return ABS; } "(abs)" { return ABS; }
/* Most register accesses are lexed as REGFILE[0-9]+, to prevent the register /* Most register accesses are lexed as REGFILE[0-9]+, to prevent the register