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tools/intel_error_decode: Add gen8+ fault data encodings

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These two registers contains the 48bit fault address.

Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
This commit is contained in:
Mika Kuoppala 2015-03-24 13:03:26 +02:00
parent f96bfb8e8c
commit 559987fc01
1 changed files with 18 additions and 1 deletions
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19
tools/intel_error_decode.c
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@ -418,6 +418,19 @@ print_fault_reg(unsigned devid, uint32_t reg)
printf(" Source ID %d\n", reg >> 3 & 0xff); printf(" Source ID %d\n", reg >> 3 & 0xff);
} }
static void
print_fault_data(unsigned devid, uint32_t data1, uint32_t data0)
{
uint64_t address;
if (intel_gen(devid) < 8)
return;
address = ((uint64_t)(data0) << 12) | ((uint64_t)data1 & 0xf) << 44;
printf(" Address 0x%016" PRIx64 " %s\n", address,
data1 & (1 << 4) ? "GGTT" : "PPGTT");
}
#define MAX_RINGS 10 /* I really hope this never... */ #define MAX_RINGS 10 /* I really hope this never... */
uint32_t head[MAX_RINGS]; uint32_t head[MAX_RINGS];
int head_ndx = 0; int head_ndx = 0;
@ -499,7 +512,7 @@ read_data_file(FILE *file)
matched = sscanf(line, "%08x : %08x", &offset, &value); matched = sscanf(line, "%08x : %08x", &offset, &value);
if (matched != 2) { if (matched != 2) {
unsigned int reg; unsigned int reg, reg2;
/* display reg section is after the ringbuffers, don't mix them */ /* display reg section is after the ringbuffers, don't mix them */
decode(decode_ctx, is_batch, ring_name, gtt_offset, decode(decode_ctx, is_batch, ring_name, gtt_offset,
@ -562,6 +575,10 @@ read_data_file(FILE *file)
if (matched == 1 && reg) if (matched == 1 && reg)
print_fault_reg(devid, reg); print_fault_reg(devid, reg);
matched = sscanf(line, " FAULT_TLB_DATA: 0x%08x 0x%08x\n", &reg, &reg2);
if (matched == 2)
print_fault_data(devid, reg, reg2);
continue; continue;
} }