diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 446e5e3e..d431ebff 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -32,6 +32,7 @@ TESTS_progs_M = \ gem_exec_nop \ gem_exec_params \ gem_exec_parse \ + gem_exec_reloc \ gem_fenced_exec_thrash \ gem_fence_thrash \ gem_fence_upload \ diff --git a/tests/gem_exec_reloc.c b/tests/gem_exec_reloc.c new file mode 100644 index 00000000..140192d9 --- /dev/null +++ b/tests/gem_exec_reloc.c @@ -0,0 +1,230 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "igt.h" + +IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl relocations."); + +static uint32_t find_last_set(uint64_t x) +{ + uint32_t i = 0; + while (x) { + x >>= 1; + i++; + } + return i; +} + +static void write_dword(int fd, + uint32_t target_handle, + uint64_t target_offset, + uint32_t value) +{ + int gen = intel_gen(intel_get_drm_devid(fd)); + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 obj[2]; + struct drm_i915_gem_relocation_entry reloc; + uint32_t buf[16]; + int i; + + memset(obj, 0, sizeof(obj)); + obj[0].handle = target_handle; + obj[1].handle = gem_create(fd, 4096); + + i = 0; + buf[i++] = MI_STORE_DWORD_IMM; + if (gen >= 8) { + buf[i++] = target_offset; + buf[i++] = target_offset >> 32; + } else if (gen >= 4) { + buf[i++] = 0; + buf[i++] = target_offset; + } else { + buf[i-1]--; + buf[i-1] |= 1 << 22; + buf[i++] = target_offset; + } + buf[i++] = value; + buf[i++] = MI_BATCH_BUFFER_END; + gem_write(fd, obj[1].handle, 0, buf, sizeof(buf)); + + memset(&reloc, 0, sizeof(reloc)); + if (gen >= 8 || gen < 4) + reloc.offset = sizeof(uint32_t); + else + reloc.offset = 2*sizeof(uint32_t); + reloc.target_handle = target_handle; + reloc.delta = target_offset; + reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION; + reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION; + + obj[1].relocation_count = 1; + obj[1].relocs_ptr = (uintptr_t)&reloc; + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = (uintptr_t)obj; + execbuf.buffer_count = 2; + gem_execbuf(fd, &execbuf); + gem_close(fd, obj[1].handle); +} + +static void from_mmap(int fd, uint64_t size, int use_gtt) +{ + uint32_t bbe = MI_BATCH_BUFFER_END; + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 obj; + struct drm_i915_gem_relocation_entry *relocs; + uint64_t value; + uint64_t max, i; + + intel_require_memory(1, size, CHECK_RAM); + + memset(&obj, 0, sizeof(obj)); + obj.handle = gem_create(fd, 4096); + gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe)); + + max = size / sizeof(*relocs); + if (use_gtt < 0) { + relocs = mmap(0, size, + PROT_WRITE, MAP_PRIVATE | MAP_ANON, + -1, 0); + igt_assert(relocs != (void *)-1); + } else if (use_gtt) { + uint32_t reloc_handle; + + reloc_handle = gem_create(fd, size); + relocs = gem_mmap__gtt(fd, reloc_handle, size, PROT_WRITE); + gem_set_domain(fd, reloc_handle, + I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + gem_close(fd, reloc_handle); + } else { + uint32_t reloc_handle; + + reloc_handle = gem_create(fd, size); + relocs = gem_mmap__cpu(fd, reloc_handle, 0, size, PROT_WRITE); + gem_set_domain(fd, reloc_handle, + I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); + gem_close(fd, reloc_handle); + } + + for (i = 0; i < max; i++) { + relocs[i].target_handle = obj.handle; + relocs[i].presumed_offset = 0; + relocs[i].offset = 1024; + relocs[i].delta = i; + relocs[i].read_domains = I915_GEM_DOMAIN_INSTRUCTION; + relocs[i].write_domain = 0; + } + obj.relocation_count = max; + obj.relocs_ptr = (uintptr_t)relocs; + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = (uintptr_t)&obj; + execbuf.buffer_count = 1; + gem_execbuf(fd, &execbuf); + gem_read(fd, obj.handle, 1024, &value, sizeof(value)); + gem_close(fd, obj.handle); + + igt_assert_eq_u64(value, obj.offset + max - 1); + for (i = 0; i < max; i++) { + if (relocs[i].presumed_offset == ~0ull) + continue; + + igt_assert_eq_u64(relocs[i].presumed_offset, obj.offset); + } + munmap(relocs, size); +} + +static void from_gpu(int fd) +{ + uint32_t bbe = MI_BATCH_BUFFER_END; + struct drm_i915_gem_execbuffer2 execbuf; + struct drm_i915_gem_exec_object2 obj; + struct drm_i915_gem_relocation_entry *relocs; + uint32_t reloc_handle; + uint64_t value; + + memset(&obj, 0, sizeof(obj)); + obj.handle = gem_create(fd, 4096); + gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe)); + + reloc_handle = gem_create(fd, 4096); + write_dword(fd, + reloc_handle, + offsetof(struct drm_i915_gem_relocation_entry, + target_handle), + obj.handle); + write_dword(fd, + reloc_handle, + offsetof(struct drm_i915_gem_relocation_entry, + offset), + 1024); + write_dword(fd, + reloc_handle, + offsetof(struct drm_i915_gem_relocation_entry, + read_domains), + I915_GEM_DOMAIN_INSTRUCTION); + + relocs = gem_mmap__cpu(fd, reloc_handle, 0, 4096, PROT_READ); + gem_set_domain(fd, reloc_handle, + I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); + gem_close(fd, reloc_handle); + + obj.relocation_count = 1; + obj.relocs_ptr = (uintptr_t)relocs; + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = (uintptr_t)&obj; + execbuf.buffer_count = 1; + gem_execbuf(fd, &execbuf); + gem_read(fd, obj.handle, 1024, &value, sizeof(value)); + gem_close(fd, obj.handle); + + igt_assert_eq_u64(value, obj.offset); + igt_assert_eq_u64(relocs->presumed_offset, obj.offset); + munmap(relocs, 4096); +} + +igt_main +{ + uint64_t size; + int fd = -1; + + igt_fixture + fd = drm_open_driver(DRIVER_INTEL); + + for (size = 4096; size <= 4ull*1024*1024*1024; size <<= 1) { + igt_subtest_f("mmap-%u", find_last_set(size) - 1) + from_mmap(fd, size, -1); + igt_subtest_f("cpu-%u", find_last_set(size) - 1) + from_mmap(fd, size, 0); + igt_subtest_f("gtt-%u", find_last_set(size) - 1) + from_mmap(fd, size, 1); + } + + igt_subtest("gpu") + from_gpu(fd); + + igt_fixture + close(fd); +}