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https://github.com/tiagovignatti/intel-gpu-tools.git
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instdone: Add support for one of the IVB instdone regs.
[danvet: added GAM and GAFM bits.]
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@ -134,10 +134,34 @@ init_g4x_instdone1(void)
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gen4_instdone1_bit(G4X_VF_DONE, "VF");
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gen4_instdone1_bit(G4X_VF_DONE, "VF");
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}
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}
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static void
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init_gen7_instdone(void)
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{
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gen6_instdone1_bit(1 << 19, "GAM");
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gen6_instdone1_bit(1 << 18, "GAFM");
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gen6_instdone1_bit(1 << 17, "TSG");
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gen6_instdone1_bit(1 << 16, "VFE");
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gen6_instdone1_bit(1 << 15, "GAFS");
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gen6_instdone1_bit(1 << 14, "SVG");
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gen6_instdone1_bit(1 << 13, "URBM");
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gen6_instdone1_bit(1 << 12, "TDG");
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gen6_instdone1_bit(1 << 9, "SF");
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gen6_instdone1_bit(1 << 8, "CL");
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gen6_instdone1_bit(1 << 7, "SOL");
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gen6_instdone1_bit(1 << 6, "GS");
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gen6_instdone1_bit(1 << 5, "DS");
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gen6_instdone1_bit(1 << 4, "TE");
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gen6_instdone1_bit(1 << 3, "HS");
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gen6_instdone1_bit(1 << 2, "VS");
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gen6_instdone1_bit(1 << 1, "VF");
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}
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void
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void
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init_instdone_definitions(uint32_t devid)
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init_instdone_definitions(uint32_t devid)
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{
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{
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if (IS_GEN6(devid)) {
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if (IS_GEN7(devid)) {
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init_gen7_instdone();
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} else if (IS_GEN6(devid)) {
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/* Now called INSTDONE_1 in the docs. */
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/* Now called INSTDONE_1 in the docs. */
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gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 3");
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gen6_instdone1_bit(GEN6_MA_3_DONE, "Message Arbiter 3");
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gen6_instdone1_bit(GEN6_EU_32_DONE, "EU 32");
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gen6_instdone1_bit(GEN6_EU_32_DONE, "EU 32");
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