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tools: Added intel_dpio_read and intel_dpio_write

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In Valleyview the DPLL and lane control registers are accessible only
through side band fabric called DPIO. Added two tools to read and write
registers residing in this space.

v2: Moved the core read/write functions to lib/intel_dpio.c based on
Ben's feedback

Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Vijay Purushothaman
2012-08-17 18:06:52 +05:30
committed by Daniel Vetter
parent 082826de6c
commit 4fc76adf31
8 changed files with 250 additions and 0 deletions
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lib/intel_chipset.h
+2
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@@ -196,6 +196,8 @@
dev == PCI_CHIP_IVYBRIDGE_S_GT2 || \
dev == PCI_CHIP_VALLEYVIEW_PO)
#define IS_VALLEYVIEW(devid) (devid == PCI_CHIP_VALLEYVIEW_PO)
#define IS_HSW_GT1(devid) (devid == PCI_CHIP_HASWELL_GT1 || \
devid == PCI_CHIP_HASWELL_M_GT1 || \
devid == PCI_CHIP_HASWELL_S_GT1 || \