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https://github.com/tiagovignatti/intel-gpu-tools.git
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igt: Add gem_exec_parallel
Attempt to fill buffers using many clients working in parallel. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Chris Wilson
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abc8aa40de
commit
4a62f0b43f
@ -75,6 +75,8 @@ gem_ctx_basic_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
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gem_ctx_basic_LDADD = $(LDADD) -lpthread
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gem_ctx_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
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gem_ctx_thrash_LDADD = $(LDADD) -lpthread
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gem_exec_parallel_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
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gem_exec_parallel_LDADD = $(LDADD) -lpthread
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gem_fence_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
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gem_fence_thrash_LDADD = $(LDADD) -lpthread
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gem_fence_upload_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
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@ -34,6 +34,7 @@ TESTS_progs_M = \
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gem_exec_create \
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gem_exec_faulting_reloc \
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gem_exec_nop \
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gem_exec_parallel \
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gem_exec_params \
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gem_exec_parse \
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gem_exec_store \
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291
tests/gem_exec_parallel.c
Normal file
291
tests/gem_exec_parallel.c
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@ -0,0 +1,291 @@
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/*
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* Copyright © 2009 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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/** @file gem_exec_parallel.c
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*
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* Exercise using many, many writers into a buffer.
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*/
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#include <pthread.h>
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#include "igt.h"
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#include "igt_gt.h"
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#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
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#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
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#define LOCAL_I915_EXEC_BSD_SHIFT (13)
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#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
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#define ENGINE_MASK (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
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#define VERIFY 0
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static void check_bo(int fd, uint32_t handle, int pass)
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{
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uint32_t *map;
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int i;
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igt_debug("Verifying result (pass=%d, handle=%d)\n", pass, handle);
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map = gem_mmap__cpu(fd, handle, 0, 4096, PROT_READ);
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gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, 0);
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for (i = 0; i < 1024; i++)
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igt_assert_eq(map[i], i);
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munmap(map, 4096);
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}
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static uint32_t __gem_context_create(int fd)
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{
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struct drm_i915_gem_context_create arg;
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memset(&arg, 0, sizeof(arg));
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if (drmIoctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &arg) == 0)
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gem_context_destroy(fd, arg.ctx_id);
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return arg.ctx_id;
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}
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static void gem_require_context(int fd)
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{
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igt_require(__gem_context_create(fd));
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}
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static bool can_mi_store_dword(int gen, unsigned engine)
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{
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return !(gen == 6 && (engine & ~(3<<13)) == I915_EXEC_BSD);
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}
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static bool ignore_engine(int gen, unsigned engine)
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{
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if (engine == 0)
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return true;
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if (!can_mi_store_dword(gen, engine))
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return true;
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return false;
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}
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#define CONTEXTS 0x1
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#define FDS 0x2
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struct thread {
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pthread_t thread;
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pthread_mutex_t *mutex;
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pthread_cond_t *cond;
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unsigned flags;
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uint32_t *scratch;
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unsigned id;
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unsigned engine;
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int fd, gen, *go;
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};
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static void *thread(void *data)
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{
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struct thread *t = data;
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struct drm_i915_gem_exec_object2 obj[2];
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struct drm_i915_gem_relocation_entry reloc;
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struct drm_i915_gem_execbuffer2 execbuf;
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uint32_t batch[16];
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int fd, i;
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pthread_mutex_lock(t->mutex);
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while (*t->go == 0)
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pthread_cond_wait(t->cond, t->mutex);
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pthread_mutex_unlock(t->mutex);
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if (t->flags & FDS)
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fd = drm_open_driver(DRIVER_INTEL);
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else
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fd = t->fd;
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i = 0;
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batch[i] = MI_STORE_DWORD_IMM | (t->gen < 6 ? 1 << 22 : 0);
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if (t->gen >= 8) {
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batch[++i] = 4*t->id;
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batch[++i] = 0;
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} else if (t->gen >= 4) {
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batch[++i] = 0;
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batch[++i] = 4*t->id;
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} else {
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batch[i]--;
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batch[++i] = 4*t->id;
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}
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batch[++i] = t->id;
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batch[++i] = MI_BATCH_BUFFER_END;
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memset(obj, 0, sizeof(obj));
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obj[0].flags = EXEC_OBJECT_WRITE;
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memset(&reloc, 0, sizeof(reloc));
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reloc.offset = sizeof(uint32_t);
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if (t->gen < 8 && t->gen >= 4)
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reloc.offset += sizeof(uint32_t);
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reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
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reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
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reloc.delta = 4*t->id;
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obj[1].handle = gem_create(fd, 4096);
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obj[1].relocs_ptr = (uintptr_t)&reloc;
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obj[1].relocation_count = 1;
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gem_write(fd, obj[1].handle, 0, batch, sizeof(batch));
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)obj;
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execbuf.buffer_count = 2;
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execbuf.flags = t->engine;
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execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
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execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
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if (t->gen < 6)
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execbuf.flags |= I915_EXEC_SECURE;
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if (t->flags & CONTEXTS)
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execbuf.rsvd1 = gem_context_create(fd);
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for (i = 0; i < 16; i++) {
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obj[0].handle = t->scratch[i];
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if (t->flags & FDS)
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obj[0].handle = gem_open(fd, obj[0].handle);
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gem_execbuf(fd, &execbuf);
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if (t->flags & FDS)
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gem_close(fd, obj[0].handle);
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}
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if (t->flags & CONTEXTS)
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gem_context_destroy(fd, execbuf.rsvd1);
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gem_close(fd, obj[1].handle);
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if (t->flags & FDS)
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close(fd);
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return NULL;
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}
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static void all(int fd, unsigned engine, unsigned flags)
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{
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const int gen = intel_gen(intel_get_drm_devid(fd));
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pthread_mutex_t mutex;
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pthread_cond_t cond;
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struct thread *threads;
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unsigned engines[16];
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unsigned nengine;
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uint32_t scratch[16], handle[16];
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int go;
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int i;
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if (flags & CONTEXTS)
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gem_require_context(fd);
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nengine = 0;
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if (engine == -1) {
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for_each_engine(fd, engine) {
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if (!ignore_engine(gen, engine))
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engines[nengine++] = engine;
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}
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} else {
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igt_require(gem_has_ring(fd, engine));
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igt_require(can_mi_store_dword(gen, engine));
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engines[nengine++] = engine;
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}
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igt_require(nengine);
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for (i = 0; i < 16; i++) {
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scratch[i] = handle[i] = gem_create(fd, 4096);
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if (flags & FDS)
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scratch[i] = gem_flink(fd, handle[i]);
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}
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threads = calloc(1024, sizeof(struct thread));
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igt_assert(threads);
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pthread_mutex_init(&mutex, 0);
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pthread_cond_init(&cond, 0);
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go = 0;
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for (i = 0; i < 1024; i++) {
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threads[i].id = i;
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threads[i].fd = fd;
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threads[i].gen = gen;
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threads[i].engine = engines[i % nengine];
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threads[i].flags = flags;
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threads[i].scratch = scratch;
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threads[i].mutex = &mutex;
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threads[i].cond = &cond;
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threads[i].go = &go;
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pthread_create(&threads[i].thread, 0, thread, &threads[i]);
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}
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pthread_mutex_lock(&mutex);
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go = 1024;
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pthread_cond_broadcast(&cond);
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pthread_mutex_unlock(&mutex);
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for (i = 0; i < 1024; i++)
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pthread_join(threads[i].thread, NULL);
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for (i = 0; i < 16; i++) {
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check_bo(fd, handle[i], i);
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gem_close(fd, handle[i]);
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}
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free(threads);
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}
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igt_main
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{
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const struct mode {
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const char *name;
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unsigned flags;
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} modes[] = {
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{ "", 0 },
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{ "contexts", CONTEXTS },
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{ "fds", FDS },
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{ NULL }
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};
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int fd;
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igt_fixture
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fd = drm_open_driver_master(DRIVER_INTEL);
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igt_fork_hang_detector(fd);
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for (const struct mode *m = modes; m->name; m++)
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igt_subtest_f("%s", *m->name ? m->name : "basic")
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all(fd, -1, m->flags);
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for (const struct intel_execution_engine *e = intel_execution_engines;
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e->name; e++) {
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for (const struct mode *m = modes; m->name; m++)
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igt_subtest_f("%s%s%s",
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e->name,
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*m->name ? "-" : "",
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m->name)
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all(fd, e->exec_id | e->flags, m->flags);
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}
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igt_stop_hang_detector();
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igt_fixture
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close(fd);
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}
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