mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
synced 2025-06-10 01:16:18 +00:00
tests: merge gem_*_concurrent_blt together
Too much copy&pasting isn't good. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter
parent
f542b0970a
commit
43779e37b5
4
tests/.gitignore
vendored
4
tests/.gitignore
vendored
@ -11,7 +11,7 @@ gem_bad_blit
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gem_bad_length
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gem_basic
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gem_caching
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gem_cpu_concurrent_blit
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gem_concurrent_blit
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gem_cpu_reloc
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gem_cs_prefetch
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gem_cs_tlb
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@ -32,7 +32,6 @@ gem_fenced_exec_thrash
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gem_fence_thrash
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gem_flink
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gem_flink_race
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gem_gtt_concurrent_blit
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gem_gtt_cpu_tlb
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gem_gtt_speed
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gem_hang
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@ -49,7 +48,6 @@ gem_pin
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gem_pipe_control_store_loop
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gem_pread
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gem_pread_after_blit
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gem_prw_concurrent_blit
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gem_pwrite
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gem_pwrite_pread
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gem_readwrite
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@ -18,7 +18,7 @@ endif
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TESTS_progs_M = \
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gem_basic \
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gem_caching \
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gem_cpu_concurrent_blit \
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gem_concurrent_blit \
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gem_cs_tlb \
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gem_ctx_bad_exec \
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gem_dummy_reloc_loop \
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@ -27,13 +27,11 @@ TESTS_progs_M = \
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gem_fence_thrash \
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gem_flink \
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gem_flink_race \
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gem_gtt_concurrent_blit \
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gem_linear_blits \
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gem_mmap_gtt \
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gem_partial_pwrite_pread \
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gem_pread \
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gem_pread_after_blit \
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gem_prw_concurrent_blit \
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gem_pwrite \
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gem_pwrite_pread \
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gem_readwrite \
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@ -27,7 +27,7 @@
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*
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*/
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/** @file gem_prw_concurrent_blit.c
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/** @file gem_concurrent_blit.c
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*
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* This is a test of pread/pwrite behavior when writing to active
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* buffers.
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@ -52,7 +52,7 @@
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#include "intel_gpu_tools.h"
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static void
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set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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prw_set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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{
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int size = width * height;
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uint32_t *vaddr, *tmp;
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@ -65,7 +65,7 @@ set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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}
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static void
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cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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prw_cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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{
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int size = width * height;
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uint32_t *vaddr, *tmp;
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@ -78,7 +78,7 @@ cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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}
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static drm_intel_bo *
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create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
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unmapped_create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
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{
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drm_intel_bo *bo;
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@ -88,123 +88,195 @@ create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
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return bo;
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}
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int
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main(int argc, char **argv)
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static void
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gtt_set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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{
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int size = width * height;
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uint32_t *vaddr;
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drm_intel_gem_bo_start_gtt_access(bo, true);
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vaddr = bo->virtual;
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while (size--)
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*vaddr++ = val;
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}
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static void
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gtt_cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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{
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int size = width * height;
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uint32_t *vaddr;
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drm_intel_gem_bo_start_gtt_access(bo, false);
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vaddr = bo->virtual;
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while (size--)
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igt_assert(*vaddr++ == val);
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}
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static drm_intel_bo *
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gtt_create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
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{
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drm_intel_bo *bo;
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bo = drm_intel_bo_alloc(bufmgr, "bo", 4*width*height, 0);
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igt_assert(bo);
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/* gtt map doesn't have a write parameter, so just keep the mapping
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* around (to avoid the set_domain with the gtt write domain set) and
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* manually tell the kernel when we start access the gtt. */
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do_or_die(drm_intel_gem_bo_map_gtt(bo));
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return bo;
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}
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static void
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cpu_set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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{
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int size = width * height;
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uint32_t *vaddr;
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do_or_die(drm_intel_bo_map(bo, true));
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vaddr = bo->virtual;
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while (size--)
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*vaddr++ = val;
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drm_intel_bo_unmap(bo);
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}
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static void
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cpu_cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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{
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int size = width * height;
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uint32_t *vaddr;
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do_or_die(drm_intel_bo_map(bo, false));
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vaddr = bo->virtual;
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while (size--)
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igt_assert(*vaddr++ == val);
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drm_intel_bo_unmap(bo);
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}
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struct access_mode {
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void (*set_bo)(drm_intel_bo *bo, uint32_t val, int w, int h);
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void (*cmp_bo)(drm_intel_bo *bo, uint32_t val, int w, int h);
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drm_intel_bo *(*create_bo)(drm_intel_bufmgr *bufmgr,
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uint32_t val, int width, int height);
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const char *name;
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};
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struct access_mode access_modes[] = {
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{ .set_bo = prw_set_bo, .cmp_bo = prw_cmp_bo,
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.create_bo = unmapped_create_bo, .name = "prw" },
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{ .set_bo = cpu_set_bo, .cmp_bo = cpu_cmp_bo,
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.create_bo = unmapped_create_bo, .name = "cpu" },
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{ .set_bo = gtt_set_bo, .cmp_bo = gtt_cmp_bo,
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.create_bo = gtt_create_bo, .name = "gtt" },
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};
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int num_buffers = 128, fd;
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drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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static void
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run_modes(struct access_mode *mode)
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{
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drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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int num_buffers = 128, max;
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drm_intel_bo *src[128], *dst[128], *dummy = NULL;
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int width = 512, height = 512;
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int fd, loop, i, nc;
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int loop, i, nc;
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pid_t children[16];
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igt_subtest_init(argc, argv);
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igt_skip_on_simulation();
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fd = drm_open_any();
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max = gem_aperture_size (fd) / (1024 * 1024) / 2;
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if (num_buffers > max)
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num_buffers = max;
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bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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drm_intel_bo *src[128], *dst[128], *dummy = NULL;
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if (!igt_only_list_subtests()) {
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for (i = 0; i < num_buffers; i++) {
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src[i] = create_bo(bufmgr, i, width, height);
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dst[i] = create_bo(bufmgr, ~i, width, height);
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src[i] = mode->create_bo(bufmgr, i, width, height);
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dst[i] = mode->create_bo(bufmgr, ~i, width, height);
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}
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dummy = create_bo(bufmgr, 0, width, height);
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dummy = mode->create_bo(bufmgr, 0, width, height);
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}
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/* try to overwrite the source values */
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igt_subtest("overwrite-source") {
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igt_subtest_f("%s-overwrite-source", mode->name) {
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for (i = 0; i < num_buffers; i++) {
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set_bo(src[i], i, width, height);
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set_bo(dst[i], i, width, height);
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mode->set_bo(src[i], i, width, height);
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mode->set_bo(dst[i], i, width, height);
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}
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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mode->set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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mode->cmp_bo(dst[i], i, width, height);
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}
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/* try to read the results before the copy completes */
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igt_subtest("early-read") {
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igt_subtest_f("%s-early-read", mode->name) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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mode->set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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mode->cmp_bo(dst[i], 0xdeadbeef, width, height);
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}
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/* and finally try to trick the kernel into loosing the pending write */
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igt_subtest("gpu-read-after-write") {
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igt_subtest_f("%s-gpu-read-after-write", mode->name) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xabcdabcd, width, height);
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mode->set_bo(src[i], 0xabcdabcd, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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intel_copy_bo(batch, dummy, dst[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xabcdabcd, width, height);
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mode->cmp_bo(dst[i], 0xabcdabcd, width, height);
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}
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igt_fork_signal_helper();
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/* try to read the results before the copy completes */
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igt_subtest("overwrite-source-interruptible") {
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igt_subtest_f("%s-overwrite-source-interruptible", mode->name) {
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for (loop = 0; loop < 10; loop++) {
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gem_quiescent_gpu(fd);
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for (i = 0; i < num_buffers; i++) {
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set_bo(src[i], i, width, height);
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set_bo(dst[i], i, width, height);
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mode->set_bo(src[i], i, width, height);
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mode->set_bo(dst[i], i, width, height);
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}
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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mode->set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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mode->cmp_bo(dst[i], i, width, height);
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}
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}
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/* try to read the results before the copy completes */
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igt_subtest("early-read-interruptible") {
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igt_subtest_f("%s-early-read-interruptible", mode->name) {
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for (loop = 0; loop < 10; loop++) {
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gem_quiescent_gpu(fd);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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mode->set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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mode->cmp_bo(dst[i], 0xdeadbeef, width, height);
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}
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}
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/* and finally try to trick the kernel into loosing the pending write */
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igt_subtest("gpu-read-after-write-interruptible") {
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igt_subtest_f("%s-gpu-read-after-write-interruptible", mode->name) {
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for (loop = 0; loop < 10; loop++) {
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gem_quiescent_gpu(fd);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xabcdabcd, width, height);
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mode->set_bo(src[i], 0xabcdabcd, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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intel_copy_bo(batch, dummy, dst[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xabcdabcd, width, height);
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mode->cmp_bo(dst[i], 0xabcdabcd, width, height);
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}
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}
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/* try to read the results before the copy completes */
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igt_subtest("overwrite-source-forked") {
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igt_subtest_f("%s-overwrite-source-forked", mode->name) {
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for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
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switch ((children[nc] = fork())) {
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case -1: igt_assert(0);
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@ -215,21 +287,21 @@ main(int argc, char **argv)
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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for (i = 0; i < num_buffers; i++) {
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src[i] = create_bo(bufmgr, i, width, height);
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dst[i] = create_bo(bufmgr, ~i, width, height);
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src[i] = mode->create_bo(bufmgr, i, width, height);
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dst[i] = mode->create_bo(bufmgr, ~i, width, height);
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}
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for (loop = 0; loop < 10; loop++) {
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gem_quiescent_gpu(fd);
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for (i = 0; i < num_buffers; i++) {
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set_bo(src[i], i, width, height);
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set_bo(dst[i], i, width, height);
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mode->set_bo(src[i], i, width, height);
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mode->set_bo(dst[i], i, width, height);
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}
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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mode->set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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mode->cmp_bo(dst[i], i, width, height);
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}
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exit(0);
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}
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@ -244,7 +316,7 @@ main(int argc, char **argv)
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}
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/* try to read the results before the copy completes */
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igt_subtest("early-read-forked") {
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igt_subtest_f("%s-early-read-forked", mode->name) {
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for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
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switch ((children[nc] = fork())) {
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case -1: igt_assert(0);
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@ -255,17 +327,17 @@ main(int argc, char **argv)
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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for (i = 0; i < num_buffers; i++) {
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src[i] = create_bo(bufmgr, i, width, height);
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dst[i] = create_bo(bufmgr, ~i, width, height);
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src[i] = mode->create_bo(bufmgr, i, width, height);
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dst[i] = mode->create_bo(bufmgr, ~i, width, height);
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}
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for (loop = 0; loop < 10; loop++) {
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gem_quiescent_gpu(fd);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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mode->set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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mode->cmp_bo(dst[i], 0xdeadbeef, width, height);
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}
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exit(0);
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}
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@ -280,7 +352,7 @@ main(int argc, char **argv)
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}
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/* and finally try to trick the kernel into loosing the pending write */
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igt_subtest("gpu-read-after-write-forked") {
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igt_subtest_f("%s-gpu-read-after-write-forked", mode->name) {
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for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
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switch ((children[nc] = fork())) {
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case -1: igt_assert(0);
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@ -291,20 +363,20 @@ main(int argc, char **argv)
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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for (i = 0; i < num_buffers; i++) {
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src[i] = create_bo(bufmgr, i, width, height);
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dst[i] = create_bo(bufmgr, ~i, width, height);
|
||||
src[i] = mode->create_bo(bufmgr, i, width, height);
|
||||
dst[i] = mode->create_bo(bufmgr, ~i, width, height);
|
||||
}
|
||||
dummy = create_bo(bufmgr, 0, width, height);
|
||||
dummy = mode->create_bo(bufmgr, 0, width, height);
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xabcdabcd, width, height);
|
||||
mode->set_bo(src[i], 0xabcdabcd, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
intel_copy_bo(batch, dummy, dst[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xabcdabcd, width, height);
|
||||
mode->cmp_bo(dst[i], 0xabcdabcd, width, height);
|
||||
}
|
||||
exit(0);
|
||||
}
|
||||
@ -320,5 +392,35 @@ main(int argc, char **argv)
|
||||
|
||||
igt_stop_signal_helper();
|
||||
|
||||
if (!igt_only_list_subtests()) {
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
drm_intel_bo_unreference(src[i]);
|
||||
drm_intel_bo_unreference(dst[i]);
|
||||
}
|
||||
drm_intel_bo_unreference(dummy);
|
||||
}
|
||||
}
|
||||
|
||||
int
|
||||
main(int argc, char **argv)
|
||||
{
|
||||
int max, i;
|
||||
|
||||
igt_subtest_init(argc, argv);
|
||||
igt_skip_on_simulation();
|
||||
|
||||
fd = drm_open_any();
|
||||
|
||||
max = gem_aperture_size (fd) / (1024 * 1024) / 2;
|
||||
if (num_buffers > max)
|
||||
num_buffers = max;
|
||||
|
||||
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
|
||||
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
|
||||
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(access_modes); i++)
|
||||
run_modes(&access_modes[i]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1,321 +0,0 @@
|
||||
/*
|
||||
* Copyright © 2009,2012 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
||||
* IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Eric Anholt <eric@anholt.net>
|
||||
* Chris Wilson <chris@chris-wilson.co.uk>
|
||||
*
|
||||
*/
|
||||
|
||||
/** @file gem_cpu_concurrent_blit.c
|
||||
*
|
||||
* This is a test of CPU read/write behavior when writing to active
|
||||
* buffers.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <fcntl.h>
|
||||
#include <inttypes.h>
|
||||
#include <errno.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/wait.h>
|
||||
#include "drm.h"
|
||||
#include "i915_drm.h"
|
||||
#include "drmtest.h"
|
||||
#include "intel_bufmgr.h"
|
||||
#include "intel_batchbuffer.h"
|
||||
#include "intel_gpu_tools.h"
|
||||
|
||||
static void
|
||||
set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
|
||||
{
|
||||
int size = width * height;
|
||||
uint32_t *vaddr;
|
||||
|
||||
do_or_die(drm_intel_bo_map(bo, true));
|
||||
vaddr = bo->virtual;
|
||||
while (size--)
|
||||
*vaddr++ = val;
|
||||
drm_intel_bo_unmap(bo);
|
||||
}
|
||||
|
||||
static void
|
||||
cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
|
||||
{
|
||||
int size = width * height;
|
||||
uint32_t *vaddr;
|
||||
|
||||
do_or_die(drm_intel_bo_map(bo, false));
|
||||
vaddr = bo->virtual;
|
||||
while (size--)
|
||||
igt_assert(*vaddr++ == val);
|
||||
drm_intel_bo_unmap(bo);
|
||||
}
|
||||
|
||||
static drm_intel_bo *
|
||||
create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
|
||||
{
|
||||
drm_intel_bo *bo;
|
||||
|
||||
bo = drm_intel_bo_alloc(bufmgr, "bo", 4*width*height, 0);
|
||||
igt_assert(bo);
|
||||
|
||||
return bo;
|
||||
}
|
||||
|
||||
int
|
||||
main(int argc, char **argv)
|
||||
{
|
||||
drm_intel_bufmgr *bufmgr;
|
||||
struct intel_batchbuffer *batch;
|
||||
int num_buffers = 128, max;
|
||||
drm_intel_bo *src[128], *dst[128], *dummy = NULL;
|
||||
int width = 512, height = 512;
|
||||
int i, loop, fd, nc;
|
||||
pid_t children[16];
|
||||
|
||||
igt_subtest_init(argc, argv);
|
||||
igt_skip_on_simulation();
|
||||
|
||||
fd = drm_open_any();
|
||||
|
||||
max = gem_aperture_size (fd) / (1024 * 1024) / 2;
|
||||
if (num_buffers > max)
|
||||
num_buffers = max;
|
||||
|
||||
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
|
||||
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
|
||||
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
|
||||
|
||||
if (!igt_only_list_subtests()) {
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
src[i] = create_bo(bufmgr, i, width, height);
|
||||
dst[i] = create_bo(bufmgr, ~i, width, height);
|
||||
}
|
||||
dummy = create_bo(bufmgr, 0, width, height);
|
||||
}
|
||||
|
||||
/* try to overwrite the source values */
|
||||
igt_subtest("overwrite-source") {
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
set_bo(src[i], i, width, height);
|
||||
set_bo(dst[i], i, width, height);
|
||||
}
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
cmp_bo(dst[i], i, width, height);
|
||||
}
|
||||
|
||||
/* try to read the results before the copy completes */
|
||||
igt_subtest("early-read") {
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xdeadbeef, width, height);
|
||||
}
|
||||
|
||||
/* and finally try to trick the kernel into loosing the pending write */
|
||||
igt_subtest("gpu-read-after-write") {
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xabcdabcd, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
intel_copy_bo(batch, dummy, dst[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xabcdabcd, width, height);
|
||||
}
|
||||
|
||||
igt_fork_signal_helper();
|
||||
|
||||
/* try to overwrite the source values */
|
||||
igt_subtest("overwrite-source-interruptible") {
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
set_bo(src[i], i, width, height);
|
||||
set_bo(dst[i], i, width, height);
|
||||
}
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
cmp_bo(dst[i], i, width, height);
|
||||
}
|
||||
}
|
||||
|
||||
/* try to read the results before the copy completes */
|
||||
igt_subtest("early-read-interruptible") {
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xdeadbeef, width, height);
|
||||
}
|
||||
}
|
||||
|
||||
/* and finally try to trick the kernel into loosing the pending write */
|
||||
igt_subtest("gpu-read-after-write-interruptible") {
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xabcdabcd, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
intel_copy_bo(batch, dummy, dst[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xabcdabcd, width, height);
|
||||
}
|
||||
}
|
||||
|
||||
/* try to overwrite the source values */
|
||||
igt_subtest("overwrite-source-forked") {
|
||||
for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
|
||||
switch ((children[nc] = fork())) {
|
||||
case -1: igt_assert(0);
|
||||
default: break;
|
||||
case 0:
|
||||
/* recreate process local variables */
|
||||
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
|
||||
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
|
||||
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
src[i] = create_bo(bufmgr, i, width, height);
|
||||
dst[i] = create_bo(bufmgr, ~i, width, height);
|
||||
}
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
set_bo(src[i], i, width, height);
|
||||
set_bo(dst[i], i, width, height);
|
||||
}
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
cmp_bo(dst[i], i, width, height);
|
||||
}
|
||||
exit(0);
|
||||
}
|
||||
}
|
||||
for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
|
||||
int status = -1;
|
||||
while (waitpid(children[nc], &status, 0) == -1 &&
|
||||
errno == -EINTR)
|
||||
;
|
||||
igt_assert(status == 0);
|
||||
}
|
||||
}
|
||||
|
||||
/* try to read the results before the copy completes */
|
||||
igt_subtest("early-read-forked") {
|
||||
for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
|
||||
switch ((children[nc] = fork())) {
|
||||
case -1: igt_assert(0);
|
||||
default: break;
|
||||
case 0:
|
||||
/* recreate process local variables */
|
||||
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
|
||||
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
|
||||
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
src[i] = create_bo(bufmgr, i, width, height);
|
||||
dst[i] = create_bo(bufmgr, ~i, width, height);
|
||||
}
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xdeadbeef, width, height);
|
||||
}
|
||||
exit(0);
|
||||
}
|
||||
}
|
||||
for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
|
||||
int status = -1;
|
||||
while (waitpid(children[nc], &status, 0) == -1 &&
|
||||
errno == -EINTR)
|
||||
;
|
||||
igt_assert(status == 0);
|
||||
}
|
||||
}
|
||||
|
||||
/* and finally try to trick the kernel into loosing the pending write */
|
||||
igt_subtest("gpu-read-after-write-forked") {
|
||||
for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
|
||||
switch ((children[nc] = fork())) {
|
||||
case -1: igt_assert(0);
|
||||
default: break;
|
||||
case 0:
|
||||
/* recreate process local variables */
|
||||
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
|
||||
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
|
||||
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
src[i] = create_bo(bufmgr, i, width, height);
|
||||
dst[i] = create_bo(bufmgr, ~i, width, height);
|
||||
}
|
||||
dummy = create_bo(bufmgr, 0, width, height);
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xabcdabcd, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
intel_copy_bo(batch, dummy, dst[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xabcdabcd, width, height);
|
||||
}
|
||||
exit(0);
|
||||
}
|
||||
}
|
||||
for (nc = 0; nc < ARRAY_SIZE(children); nc++) {
|
||||
int status = -1;
|
||||
while (waitpid(children[nc], &status, 0) == -1 &&
|
||||
errno == -EINTR)
|
||||
;
|
||||
igt_assert(status == 0);
|
||||
}
|
||||
}
|
||||
|
||||
igt_stop_signal_helper();
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1,207 +0,0 @@
|
||||
/*
|
||||
* Copyright © 2009,2012 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
||||
* IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Eric Anholt <eric@anholt.net>
|
||||
* Chris Wilson <chris@chris-wilson.co.uk>
|
||||
*
|
||||
*/
|
||||
|
||||
/** @file gem_cpu_concurrent_blit.c
|
||||
*
|
||||
* This is a test of GTT mmap read/write behavior when writing to active
|
||||
* buffers.
|
||||
*/
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <fcntl.h>
|
||||
#include <inttypes.h>
|
||||
#include <errno.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/time.h>
|
||||
#include "drm.h"
|
||||
#include "i915_drm.h"
|
||||
#include "drmtest.h"
|
||||
#include "intel_bufmgr.h"
|
||||
#include "intel_batchbuffer.h"
|
||||
#include "intel_gpu_tools.h"
|
||||
|
||||
static void
|
||||
set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
|
||||
{
|
||||
int size = width * height;
|
||||
uint32_t *vaddr;
|
||||
|
||||
drm_intel_gem_bo_start_gtt_access(bo, true);
|
||||
vaddr = bo->virtual;
|
||||
while (size--)
|
||||
*vaddr++ = val;
|
||||
}
|
||||
|
||||
static void
|
||||
cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
|
||||
{
|
||||
int size = width * height;
|
||||
uint32_t *vaddr;
|
||||
|
||||
drm_intel_gem_bo_start_gtt_access(bo, false);
|
||||
vaddr = bo->virtual;
|
||||
while (size--)
|
||||
igt_assert(*vaddr++ == val);
|
||||
}
|
||||
|
||||
static drm_intel_bo *
|
||||
create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
|
||||
{
|
||||
drm_intel_bo *bo;
|
||||
|
||||
bo = drm_intel_bo_alloc(bufmgr, "bo", 4*width*height, 0);
|
||||
igt_assert(bo);
|
||||
|
||||
/* gtt map doesn't have a write parameter, so just keep the mapping
|
||||
* around (to avoid the set_domain with the gtt write domain set) and
|
||||
* manually tell the kernel when we start access the gtt. */
|
||||
do_or_die(drm_intel_gem_bo_map_gtt(bo));
|
||||
|
||||
return bo;
|
||||
}
|
||||
|
||||
int
|
||||
main(int argc, char **argv)
|
||||
{
|
||||
drm_intel_bufmgr *bufmgr;
|
||||
struct intel_batchbuffer *batch;
|
||||
int num_buffers = 128, max;
|
||||
drm_intel_bo *src[128], *dst[128], *dummy = NULL;
|
||||
int width = 512, height = 512;
|
||||
int fd, loop, i;
|
||||
|
||||
igt_subtest_init(argc, argv);
|
||||
igt_skip_on_simulation();
|
||||
|
||||
fd = drm_open_any();
|
||||
|
||||
max = gem_aperture_size (fd) / (1024 * 1024) / 2;
|
||||
if (num_buffers > max)
|
||||
num_buffers = max;
|
||||
|
||||
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
|
||||
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
|
||||
batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
|
||||
|
||||
if (!igt_only_list_subtests()) {
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
src[i] = create_bo(bufmgr, i, width, height);
|
||||
dst[i] = create_bo(bufmgr, ~i, width, height);
|
||||
}
|
||||
dummy = create_bo(bufmgr, 0, width, height);
|
||||
}
|
||||
|
||||
/* try to overwrite the source values */
|
||||
igt_subtest("overwrite-source") {
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
set_bo(src[i], i, width, height);
|
||||
set_bo(dst[i], i, width, height);
|
||||
}
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
cmp_bo(dst[i], i, width, height);
|
||||
}
|
||||
|
||||
/* try to read the results before the copy completes */
|
||||
igt_subtest("early-read") {
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xdeadbeef, width, height);
|
||||
}
|
||||
|
||||
/* and finally try to trick the kernel into loosing the pending write */
|
||||
igt_subtest("gpu-read-after-write") {
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xabcdabcd, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
intel_copy_bo(batch, dummy, dst[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xabcdabcd, width, height);
|
||||
}
|
||||
|
||||
igt_fork_signal_helper();
|
||||
|
||||
/* try to read the results before the copy completes */
|
||||
igt_subtest("overwrite-source-interruptible") {
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = 0; i < num_buffers; i++) {
|
||||
set_bo(src[i], i, width, height);
|
||||
set_bo(dst[i], i, width, height);
|
||||
}
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
cmp_bo(dst[i], i, width, height);
|
||||
}
|
||||
}
|
||||
|
||||
/* try to read the results before the copy completes */
|
||||
igt_subtest("early-read-interruptible") {
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xdeadbeef, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xdeadbeef, width, height);
|
||||
}
|
||||
}
|
||||
|
||||
/* and finally try to trick the kernel into loosing the pending write */
|
||||
igt_subtest("gpu-read-after-write-interruptible") {
|
||||
for (loop = 0; loop < 10; loop++) {
|
||||
gem_quiescent_gpu(fd);
|
||||
for (i = num_buffers; i--; )
|
||||
set_bo(src[i], 0xabcdabcd, width, height);
|
||||
for (i = 0; i < num_buffers; i++)
|
||||
intel_copy_bo(batch, dst[i], src[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
intel_copy_bo(batch, dummy, dst[i], width, height);
|
||||
for (i = num_buffers; i--; )
|
||||
cmp_bo(dst[i], 0xabcdabcd, width, height);
|
||||
}
|
||||
}
|
||||
|
||||
igt_stop_signal_helper();
|
||||
|
||||
return 0;
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user