diff --git a/assembler/src/brw_defines.h b/assembler/src/brw_defines.h
index 9b7d871c..c3d9a519 100644
--- a/assembler/src/brw_defines.h
+++ b/assembler/src/brw_defines.h
@@ -601,6 +601,7 @@
 #define BRW_OPCODE_MAC        72
 #define BRW_OPCODE_MACH       73
 #define BRW_OPCODE_LZD        74
+#define BRW_OPCODE_CBIT       77
 #define BRW_OPCODE_ADDC       78
 #define BRW_OPCODE_SAD2       80
 #define BRW_OPCODE_SADA2      81
diff --git a/assembler/src/gram.y b/assembler/src/gram.y
index 44f5476f..bee92dd6 100644
--- a/assembler/src/gram.y
+++ b/assembler/src/gram.y
@@ -115,7 +115,7 @@ void set_direct_src_operand(struct src_operand *src, struct direct_reg *reg,
 %token <integer> MOV FRC RNDU RNDD RNDE RNDZ NOT LZD
 %token <integer> MUL MAC MACH LINE SAD2 SADA2 DP4 DPH DP3 DP2
 %token <integer> AVG ADD SEL AND OR XOR SHR SHL ASR CMP CMPN PLN
-%token <integer> ADDC BFI1 BFREV
+%token <integer> ADDC BFI1 BFREV CBIT
 %token <integer> SEND NOP JMPI IF IFF WHILE ELSE BREAK CONT HALT MSAVE
 %token <integer> PUSH MREST POP WAIT DO ENDIF ILLEGAL
 %token <integer> MATH_INST
@@ -417,7 +417,7 @@ unaryinstruction:
 		}
 ;
 
-unaryop:	MOV | FRC | RNDU | RNDD | RNDE | RNDZ | NOT | LZD | BFREV
+unaryop:	MOV | FRC | RNDU | RNDD | RNDE | RNDZ | NOT | LZD | BFREV | CBIT
 ;
 
 binaryinstruction:
diff --git a/assembler/src/lex.l b/assembler/src/lex.l
index 16c464a7..a0cce00d 100644
--- a/assembler/src/lex.l
+++ b/assembler/src/lex.l
@@ -100,6 +100,7 @@ yylval.integer = BRW_CHANNEL_W;
 "dp3" { yylval.integer = BRW_OPCODE_DP3; return DP3; }
 "dp2" { yylval.integer = BRW_OPCODE_DP2; return DP2; }
 
+"cbit" { yylval.integer = BRW_OPCODE_CBIT; return CBIT; }
 "avg" { yylval.integer = BRW_OPCODE_AVG; return AVG; }
 "add" { yylval.integer = BRW_OPCODE_ADD; return ADD; }
 "addc" { yylval.integer = BRW_OPCODE_ADDC; return ADDC; }