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Support Gen6 RET instruction.

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Homer Hsing 2012-09-27 15:39:28 +08:00 committed by Damien Lespiau
parent 7529682d0a
commit 3de439e2f5
1 changed files with 12 additions and 20 deletions
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32
assembler/src/gram.y
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@ -630,29 +630,21 @@ subroutineinstruction:
} }
| predicate RET execsize dstoperandex src instoptions | predicate RET execsize dstoperandex src instoptions
{ {
if($3 != 1 /* encoded int 2 */) { /*
fprintf(stderr, "The execution size of RET should be 2.\n"); Gen6, 7:
YYERROR; source cannot be accumulator.
} dest must be null.
if($4.reg_file != BRW_ARCHITECTURE_REGISTER_FILE && $4.reg_nr != BRW_ARF_NULL) { src0 region control must be <2,2,1> (not specified clearly. should be same as CALL)
fprintf(stderr, "The dest reg of RET should be NULL.\n"); */
YYERROR;
}
if($5.reg_type != BRW_REGISTER_TYPE_UD && $5.reg_type != BRW_REGISTER_TYPE_D) {
fprintf(stderr, "The source reg type of RET should be UD or D.\n");
YYERROR;
}
if($5.horiz_stride != 1 /*encoded 1*/
|| $5.width != 1 /*encoded 2*/
|| $5.vert_stride != 2 /*encoded 2*/) {
fprintf(stderr, "The source reg region of RET should be <2,2,1>.\n");
YYERROR;
}
memset(&$$, 0, sizeof($$)); memset(&$$, 0, sizeof($$));
set_instruction_predicate(&$$, &$1); set_instruction_predicate(&$$, &$1);
$$.header.opcode = $2; $$.header.opcode = $2;
$$.header.execution_size = $3; $$.header.execution_size = 1; /* execution size of RET should be 2 */
set_instruction_dest(&$$, &$4); set_instruction_dest(&$$, dst_null_reg);
$5.reg_type = BRW_REGISTER_TYPE_D;
$5.horiz_stride = 1; /*encoded 1*/
$5.width = 1; /*encoded 2*/
$5.vert_stride = 2; /*encoded 2*/
set_instruction_src0(&$$, &$5); set_instruction_src0(&$$, &$5);
} }
; ;