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https://github.com/tiagovignatti/intel-gpu-tools.git
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tests: add gem_prw_concurrent_blt
New testcase to check that pwrite/pread correctly synchronize with oustanding rendering. Just to catch regressions when we change something. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -31,6 +31,7 @@ TESTS_progs_M = \
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gem_mmap_gtt \
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gem_partial_pwrite_pread \
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gem_pread_after_blit \
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gem_prw_concurrent_blit \
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gem_ringfill \
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gem_set_tiling_vs_blt \
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gem_suspend \
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208
tests/gem_prw_concurrent_blit.c
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208
tests/gem_prw_concurrent_blit.c
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@ -0,0 +1,208 @@
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/*
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* Copyright © 2009,2012,2013 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Chris Wilson <chris@chris-wilson.co.uk>
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* Daniel Vetter <daniel.vetter@ffwll.ch>
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*
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*/
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/** @file gem_prw_concurrent_blit.c
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*
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* This is a test of pread/pwrite behavior when writing to active
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* buffers.
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*
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* Based on gem_gtt_concurrent_blt.
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/time.h>
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#include "drm.h"
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#include "i915_drm.h"
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#include "drmtest.h"
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#include "intel_bufmgr.h"
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#include "intel_batchbuffer.h"
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#include "intel_gpu_tools.h"
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static void
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set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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{
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int size = width * height;
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uint32_t *vaddr, *tmp;
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vaddr = tmp = malloc(size*4);
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while (size--)
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*vaddr++ = val;
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drm_intel_bo_subdata(bo, 0, width*height*4, tmp);
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free(tmp);
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}
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static void
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cmp_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
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{
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int size = width * height;
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uint32_t *vaddr, *tmp;
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vaddr = tmp = malloc(size*4);
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drm_intel_bo_get_subdata(bo, 0, size*4, tmp);
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while (size--)
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assert(*vaddr++ == val);
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free(tmp);
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}
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static drm_intel_bo *
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create_bo(drm_intel_bufmgr *bufmgr, uint32_t val, int width, int height)
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{
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drm_intel_bo *bo;
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bo = drm_intel_bo_alloc(bufmgr, "bo", 4*width*height, 0);
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assert(bo);
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return bo;
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}
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int
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main(int argc, char **argv)
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{
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drm_intel_bufmgr *bufmgr;
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struct intel_batchbuffer *batch;
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int num_buffers = 128, max;
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drm_intel_bo *src[128], *dst[128], *dummy = NULL;
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int width = 512, height = 512;
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int fd, loop, i;
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drmtest_subtest_init(argc, argv);
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drmtest_skip_on_simulation();
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fd = drm_open_any();
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max = gem_aperture_size (fd) / (1024 * 1024) / 2;
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if (num_buffers > max)
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num_buffers = max;
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bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
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drm_intel_bufmgr_gem_enable_reuse(bufmgr);
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batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
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if (!drmtest_only_list_subtests()) {
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for (i = 0; i < num_buffers; i++) {
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src[i] = create_bo(bufmgr, i, width, height);
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dst[i] = create_bo(bufmgr, ~i, width, height);
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}
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dummy = create_bo(bufmgr, 0, width, height);
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}
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/* try to overwrite the source values */
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if (drmtest_run_subtest("overwrite-source")) {
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for (i = 0; i < num_buffers; i++) {
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set_bo(src[i], i, width, height);
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set_bo(dst[i], i, width, height);
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}
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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}
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/* try to read the results before the copy completes */
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if (drmtest_run_subtest("early-read")) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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}
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/* and finally try to trick the kernel into loosing the pending write */
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if (drmtest_run_subtest("gpu-read-after-write")) {
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xabcdabcd, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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intel_copy_bo(batch, dummy, dst[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xabcdabcd, width, height);
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}
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drmtest_fork_signal_helper();
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/* try to read the results before the copy completes */
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if (drmtest_run_subtest("overwrite-source-interruptible")) {
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for (loop = 0; loop < 10; loop++) {
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gem_quiescent_gpu(fd);
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for (i = 0; i < num_buffers; i++) {
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set_bo(src[i], i, width, height);
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set_bo(dst[i], i, width, height);
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}
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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cmp_bo(dst[i], i, width, height);
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}
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}
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/* try to read the results before the copy completes */
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if (drmtest_run_subtest("early-read-interruptible")) {
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for (loop = 0; loop < 10; loop++) {
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gem_quiescent_gpu(fd);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xdeadbeef, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xdeadbeef, width, height);
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}
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}
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/* and finally try to trick the kernel into loosing the pending write */
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if (drmtest_run_subtest("gpu-read-after-write-interruptible")) {
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for (loop = 0; loop < 10; loop++) {
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gem_quiescent_gpu(fd);
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for (i = num_buffers; i--; )
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set_bo(src[i], 0xabcdabcd, width, height);
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for (i = 0; i < num_buffers; i++)
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intel_copy_bo(batch, dst[i], src[i], width, height);
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for (i = num_buffers; i--; )
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intel_copy_bo(batch, dummy, dst[i], width, height);
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for (i = num_buffers; i--; )
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cmp_bo(dst[i], 0xabcdabcd, width, height);
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}
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}
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drmtest_stop_signal_helper();
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return 0;
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}
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