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igt/gem_exec_nop: Add a basic test
Demonstrate how trivial it is to lockup Braswell, at least my N3050 nuc, by saturating the interrupt handler with a few requests. References: https://bugs.freedesktop.org/show_bug.cgi?id=93467 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -43,57 +43,123 @@
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#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
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#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
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#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
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#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
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#define LOCAL_I915_EXEC_VEBOX (4<<0)
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#define LOCAL_I915_EXEC_BSD_SHIFT (13)
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#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
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const uint32_t batch[2] = {MI_BATCH_BUFFER_END};
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#define ENGINE_FLAGS (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
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int device;
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static void loop(int fd, uint32_t handle, unsigned ring_id, const char *ring_name)
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static double elapsed(const struct timespec *start, const struct timespec *end)
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{
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return ((end->tv_sec - start->tv_sec) +
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(end->tv_nsec - start->tv_nsec)*1e-9);
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}
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static void single(int fd, uint32_t handle, unsigned ring_id, const char *ring_name)
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{
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{
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struct drm_i915_gem_execbuffer2 execbuf;
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struct drm_i915_gem_execbuffer2 execbuf;
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struct drm_i915_gem_exec_object2 gem_exec[1];
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struct drm_i915_gem_exec_object2 obj;
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int count;
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struct timespec start, now;
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unsigned int count = 0;
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gem_require_ring(fd, ring_id);
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gem_require_ring(fd, ring_id);
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memset(&gem_exec, 0, sizeof(gem_exec));
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memset(&obj, 0, sizeof(obj));
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gem_exec[0].handle = handle;
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obj.handle = handle;
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memset(&execbuf, 0, sizeof(execbuf));
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)gem_exec;
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execbuf.buffers_ptr = (uintptr_t)&obj;
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execbuf.buffer_count = 1;
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execbuf.buffer_count = 1;
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execbuf.flags = ring_id;
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execbuf.flags = ring_id;
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execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
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execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
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execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
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execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
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if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf)) {
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if (__gem_execbuf(fd, &execbuf) == 0) {
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execbuf.flags = ring_id;
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execbuf.flags = ring_id;
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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gem_execbuf(fd, &execbuf);
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}
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}
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gem_sync(fd, handle);
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gem_sync(fd, handle);
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for (count = 1; count <= SLOW_QUICK(1<<17, 1<<4); count <<= 1) {
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clock_gettime(CLOCK_MONOTONIC, &start);
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int loops = count;
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do {
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gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, 0);
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for (int loop = 0; loop < 1024; loop++) {
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while (loops--)
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gem_execbuf(fd, &execbuf);
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do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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count++;
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gem_sync(fd, handle);
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}
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clock_gettime(CLOCK_MONOTONIC, &now);
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} while (elapsed(&start, &now) < 20.);
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gem_sync(fd, handle);
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clock_gettime(CLOCK_MONOTONIC, &now);
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igt_info("%s: %'u cycles: %.3fus\n",
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ring_name, count, elapsed(&start, &now)*1e6 / count);
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}
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static void all(int fd, uint32_t handle)
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{
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struct drm_i915_gem_execbuffer2 execbuf;
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struct drm_i915_gem_exec_object2 obj;
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struct timespec start, now;
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unsigned engines[16];
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unsigned nengine;
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unsigned engine;
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unsigned int count = 0;
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nengine = 0;
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for_each_engine(fd, engine)
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engines[nengine++] = engine;
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memset(&obj, 0, sizeof(obj));
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obj.handle = handle;
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)&obj;
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execbuf.buffer_count = 1;
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execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
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execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
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if (__gem_execbuf(fd, &execbuf) == 0) {
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execbuf.flags = 0;
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gem_execbuf(fd, &execbuf);
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}
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}
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gem_sync(fd, handle);
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clock_gettime(CLOCK_MONOTONIC, &start);
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do {
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for (int loop = 0; loop < 1024; loop++) {
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for (int n = 0; n < nengine; n++) {
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execbuf.flags &= ~ENGINE_FLAGS;
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execbuf.flags |= engines[n];
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gem_execbuf(fd, &execbuf);
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}
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}
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count += nengine * 1024;
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clock_gettime(CLOCK_MONOTONIC, &now);
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} while (elapsed(&start, &now) < 150.); /* Hang detection ~120s */
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gem_sync(fd, handle);
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clock_gettime(CLOCK_MONOTONIC, &now);
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igt_info("All (%d engines): %'u cycles: %.3fus\n",
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nengine, count, elapsed(&start, &now)*1e6 / count);
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}
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}
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igt_main
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igt_main
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{
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{
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const struct intel_execution_engine *e;
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const struct intel_execution_engine *e;
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uint32_t handle = 0;
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uint32_t handle = 0;
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int device = -1;
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igt_fixture {
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igt_fixture {
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const uint32_t bbe = MI_BATCH_BUFFER_END;
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device = drm_open_driver(DRIVER_INTEL);
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device = drm_open_driver(DRIVER_INTEL);
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handle = gem_create(device, 4096);
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handle = gem_create(device, 4096);
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gem_write(device, handle, 0, batch, sizeof(batch));
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gem_write(device, handle, 0, &bbe, sizeof(bbe));
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}
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}
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for (e = intel_execution_engines; e->name; e++)
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for (e = intel_execution_engines; e->name; e++)
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igt_subtest_f("%s", e->name)
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igt_subtest_f("%s", e->name)
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loop(device, handle, e->exec_id | e->flags, e->name);
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single(device, handle, e->exec_id | e->flags, e->name);
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igt_subtest("basic")
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all(device, handle);
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igt_fixture {
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igt_fixture {
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gem_close(device, handle);
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gem_close(device, handle);
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