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https://github.com/tiagovignatti/intel-gpu-tools.git
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benchmarks: Remove gem_wait
Superseded by gem_latency. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
parent
c9da0b5221
commit
39bad606c5
1
benchmarks/.gitignore
vendored
1
benchmarks/.gitignore
vendored
@ -9,7 +9,6 @@ gem_mmap
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gem_prw
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gem_set_domain
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gem_userptr_benchmark
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gem_wait
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intel_upload_blit_large
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intel_upload_blit_large_gtt
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intel_upload_blit_large_map
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@ -9,9 +9,6 @@ benchmarks_LTLIBRARIES = gem_exec_tracer.la
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gem_exec_tracer_la_LDFLAGS = -module -avoid-version -no-undefined
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gem_exec_tracer_la_LIBADD = -ldl
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gem_wait_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
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gem_wait_LDADD = $(LDADD) -lpthread
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gem_latency_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
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gem_latency_LDADD = $(LDADD) -lpthread
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@ -16,6 +16,5 @@ benchmarks_PROGRAMS = \
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gem_prw \
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gem_set_domain \
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gem_userptr_benchmark \
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gem_wait \
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kms_vblank \
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$(NULL)
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@ -1,303 +0,0 @@
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/*
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* Copyright © 2011 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Chris Wilson <chris@chris-wilson.co.uk>
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*
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*/
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#include "igt.h"
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#include <unistd.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <fcntl.h>
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#include <inttypes.h>
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#include <pthread.h>
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#include <signal.h>
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#include <errno.h>
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#include <sys/stat.h>
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#include <sys/ioctl.h>
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#include <sys/time.h>
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#include <time.h>
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#include <math.h>
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#include "drm.h"
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#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
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#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
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#define COPY_BLT_CMD (2<<29|0x53<<22|0x6)
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#define BLT_WRITE_ALPHA (1<<21)
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#define BLT_WRITE_RGB (1<<20)
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#define BLT_SRC_TILED (1<<15)
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#define BLT_DST_TILED (1<<11)
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#define OBJECT 1024*1024
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static int has_64bit_reloc;
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static int gem_linear_blt(int fd,
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uint32_t *batch,
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int offset,
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uint32_t src,
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uint32_t dst,
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uint32_t length,
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struct drm_i915_gem_relocation_entry *reloc)
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{
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uint32_t *b = batch + offset/4;
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int height = length / (16 * 1024);
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igt_assert_lte(height, 1 << 16);
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if (height) {
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int i = 0;
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b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
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if (has_64bit_reloc)
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b[i-1]+=2;
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b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
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b[i++] = 0;
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b[i++] = height << 16 | (4*1024);
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b[i++] = 0;
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reloc->offset = (b-batch+4) * sizeof(uint32_t);
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reloc->delta = 0;
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reloc->target_handle = dst;
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reloc->read_domains = I915_GEM_DOMAIN_RENDER;
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reloc->write_domain = I915_GEM_DOMAIN_RENDER;
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reloc->presumed_offset = 0;
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reloc++;
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if (has_64bit_reloc)
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b[i++] = 0; /* FIXME */
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b[i++] = 0;
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b[i++] = 16*1024;
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b[i++] = 0;
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reloc->offset = (b-batch+7) * sizeof(uint32_t);
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if (has_64bit_reloc)
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reloc->offset += sizeof(uint32_t);
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reloc->delta = 0;
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reloc->target_handle = src;
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reloc->read_domains = I915_GEM_DOMAIN_RENDER;
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reloc->write_domain = 0;
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reloc->presumed_offset = 0;
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reloc++;
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if (has_64bit_reloc)
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b[i++] = 0; /* FIXME */
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b += i;
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length -= height * 16*1024;
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}
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if (length) {
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int i = 0;
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b[i++] = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
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if (has_64bit_reloc)
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b[i-1]+=2;
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b[i++] = 0xcc << 16 | 1 << 25 | 1 << 24 | (16*1024);
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b[i++] = height << 16;
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b[i++] = (1+height) << 16 | (length / 4);
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b[i++] = 0;
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reloc->offset = (b-batch+4) * sizeof(uint32_t);
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reloc->delta = 0;
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reloc->target_handle = dst;
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reloc->read_domains = I915_GEM_DOMAIN_RENDER;
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reloc->write_domain = I915_GEM_DOMAIN_RENDER;
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reloc->presumed_offset = 0;
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reloc++;
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if (has_64bit_reloc)
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b[i++] = 0; /* FIXME */
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b[i++] = height << 16;
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b[i++] = 16*1024;
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b[i++] = 0;
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reloc->offset = (b-batch+7) * sizeof(uint32_t);
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if (has_64bit_reloc)
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reloc->offset += sizeof(uint32_t);
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reloc->delta = 0;
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reloc->target_handle = src;
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reloc->read_domains = I915_GEM_DOMAIN_RENDER;
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reloc->write_domain = 0;
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reloc->presumed_offset = 0;
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reloc++;
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if (has_64bit_reloc)
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b[i++] = 0; /* FIXME */
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b += i;
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}
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b[0] = MI_BATCH_BUFFER_END;
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b[1] = 0;
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return (b+2 - batch) * sizeof(uint32_t);
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}
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static int __gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
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{
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int err = 0;
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if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf))
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err = -errno;
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return err;
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}
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static void waiter(int child)
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{
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struct drm_i915_gem_execbuffer2 execbuf;
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struct drm_i915_gem_exec_object2 exec[3];
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struct drm_i915_gem_relocation_entry reloc[2*4096/32];
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uint32_t *buf, handle, src, dst;
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int fd, len, gen, nreloc, last = 0;
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int ring;
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fd = drm_open_driver(DRIVER_INTEL);
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handle = gem_create(fd, 4096);
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buf = gem_mmap__cpu(fd, handle, 0, 4096, PROT_WRITE);
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gen = intel_gen(intel_get_drm_devid(fd));
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has_64bit_reloc = gen >= 8;
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src = gem_create(fd, OBJECT);
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dst = gem_create(fd, OBJECT);
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len = gem_linear_blt(fd, buf, 0, 0, 1, OBJECT, reloc);
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memset(exec, 0, sizeof(exec));
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exec[0].handle = src;
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exec[1].handle = dst;
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exec[2].handle = handle;
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if (has_64bit_reloc)
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exec[2].relocation_count = len > 56 ? 4 : 2;
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else
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exec[2].relocation_count = len > 40 ? 4 : 2;
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exec[2].relocs_ptr = (uintptr_t)reloc;
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ring = 0;
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if (gen >= 6)
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ring = I915_EXEC_BLT;
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)exec;
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execbuf.buffer_count = 3;
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execbuf.batch_len = len;
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execbuf.flags = ring;
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execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
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execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
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if (__gem_execbuf(fd, &execbuf)) {
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gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
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len = gem_linear_blt(fd, buf, 0, src, dst, OBJECT, reloc);
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igt_assert(len == execbuf.batch_len);
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execbuf.flags = ring;
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gem_execbuf(fd, &execbuf);
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}
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gem_sync(fd, handle);
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if (execbuf.flags & LOCAL_I915_EXEC_HANDLE_LUT) {
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src = 0;
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dst = 1;
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}
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nreloc = exec[2].relocation_count;
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while (execbuf.batch_len + len <= 4096) {
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last = len - 8;
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len = gem_linear_blt(fd, buf, len - 8,
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src, dst, OBJECT,
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reloc + exec[2].relocation_count);
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exec[2].relocation_count += nreloc;
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}
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munmap(buf, 4096);
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execbuf.batch_len = len;
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gem_execbuf(fd, &execbuf);
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usleep(0);
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execbuf.batch_len = len - last;
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execbuf.batch_start_offset = last;
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for (int loop = 0; loop < 16*1024; loop++)
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gem_execbuf(fd, &execbuf);
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usleep(0);
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execbuf.batch_len = len;
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execbuf.batch_start_offset = 0;
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gem_execbuf(fd, &execbuf);
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gem_sync(fd, handle);
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close(fd);
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}
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static volatile int done;
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static void *thread(void *arg)
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{
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volatile uint64_t *c = arg;
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while (!done)
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++*c;
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return NULL;
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}
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static int run(int num_waiters)
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{
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int num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
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pthread_t *threads = calloc(num_cpus, sizeof(pthread_t));
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uint64_t *counters = calloc(num_cpus, 8*sizeof(uint64_t));
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uint64_t count;
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for (int n = 0; n < num_cpus; n++)
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pthread_create(&threads[n], NULL, thread, &counters[8*n]);
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igt_fork(child, num_waiters)
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waiter(child);
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igt_waitchildren();
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done = 1;
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for (int n = 0; n < num_cpus; n++)
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pthread_join(threads[n], NULL);
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count = 0;
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for (int n = 0; n < num_cpus; n++)
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count += counters[8*n];
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printf("%llu\n", (long long unsigned)count);
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return 0;
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}
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int main(int argc, char **argv)
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{
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int num_waiters = 128;
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int c;
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while ((c = getopt (argc, argv, "w:")) != -1) {
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switch (c) {
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case 'w':
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num_waiters = atoi(optarg);
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if (num_waiters < 1)
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num_waiters = 1;
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break;
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}
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}
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return run(num_waiters);
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}
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