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tools: add Haswell registers into intel_reg_dumper
For now, only print their content for diffing, but also add the necessary bits that can be used for more verbose output in the fugure. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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committed by
Daniel Vetter
parent
e70b7de8ce
commit
3986d9faf3
@@ -1781,6 +1781,71 @@ static struct reg_debug ironlake_debug_regs[] = {
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DEFINEREG(RC6pp_RESIDENCY_TIME),
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};
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static struct reg_debug haswell_debug_regs[] = {
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/* Power wells */
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DEFINEREG(HSW_PWR_WELL_CTL1),
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DEFINEREG(HSW_PWR_WELL_CTL2),
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DEFINEREG(HSW_PWR_WELL_CTL3),
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DEFINEREG(HSW_PWR_WELL_CTL4),
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DEFINEREG(HSW_PWR_WELL_CTL5),
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DEFINEREG(HSW_PWR_WELL_CTL6),
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/* DDI pipe function */
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DEFINEREG(PIPE_DDI_FUNC_CTL_A),
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DEFINEREG(PIPE_DDI_FUNC_CTL_B),
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DEFINEREG(PIPE_DDI_FUNC_CTL_C),
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DEFINEREG(PIPE_DDI_FUNC_CTL_EDP),
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/* DP transport control */
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DEFINEREG(DP_TP_CTL_A),
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DEFINEREG(DP_TP_CTL_B),
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DEFINEREG(DP_TP_CTL_C),
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DEFINEREG(DP_TP_CTL_D),
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DEFINEREG(DP_TP_CTL_E),
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/* DP status */
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DEFINEREG(DP_TP_STATUS_A),
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DEFINEREG(DP_TP_STATUS_B),
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DEFINEREG(DP_TP_STATUS_C),
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DEFINEREG(DP_TP_STATUS_D),
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DEFINEREG(DP_TP_STATUS_E),
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/* DDI buffer control */
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DEFINEREG(DDI_BUF_CTL_A),
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DEFINEREG(DDI_BUF_CTL_B),
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DEFINEREG(DDI_BUF_CTL_C),
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DEFINEREG(DDI_BUF_CTL_D),
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DEFINEREG(DDI_BUF_CTL_E),
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/* Clocks */
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DEFINEREG(PIXCLK_GATE),
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DEFINEREG(SPLL_CTL),
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DEFINEREG(LCPLL_CTL),
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DEFINEREG(WRPLL_CTL1),
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DEFINEREG(WRPLL_CTL2),
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/* DDI port clock control */
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DEFINEREG(PORT_CLK_SEL_A),
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DEFINEREG(PORT_CLK_SEL_B),
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DEFINEREG(PORT_CLK_SEL_C),
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DEFINEREG(PORT_CLK_SEL_D),
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DEFINEREG(PORT_CLK_SEL_E),
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/* Pipe clock control */
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DEFINEREG(PIPE_CLK_SEL_A),
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DEFINEREG(PIPE_CLK_SEL_B),
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DEFINEREG(PIPE_CLK_SEL_C),
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/* Pipe line time */
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DEFINEREG(PIPE_WM_LINETIME_A),
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DEFINEREG(PIPE_WM_LINETIME_B),
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DEFINEREG(PIPE_WM_LINETIME_C),
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/* Fuses */
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DEFINEREG(SFUSE_STRAP),
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};
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static struct reg_debug i945gm_mi_regs[] = {
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DEFINEREG(PGETBL_CTL),
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DEFINEREG(PGTBL_ER),
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@@ -2117,5 +2182,8 @@ int main(int argc, char** argv)
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if (IS_GEN6(devid) || IS_GEN7(devid))
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intel_dump_regs(gen6_rp_debug_regs);
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if (IS_HASWELL(devid))
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intel_dump_regs(haswell_debug_regs);
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return 0;
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}
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