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assembler: Replace struct indirect_reg by struct brw_reg

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More code simplification can be layered on top of that (by using some
brw_* helpers to create registers), that'd be for another commit.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
This commit is contained in:
Damien Lespiau 2013-01-23 16:17:28 +00:00
parent b33b8810e0
commit 36f8f65aa0
2 changed files with 23 additions and 31 deletions
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8
assembler/gen4asm.h
View File

@ -80,14 +80,6 @@ struct regtype {
int type; int type;
int is_default; int is_default;
}; };
/**
* This structure is the internal representation of register-indirect addressed
* registers in the parser.
*/
struct indirect_reg {
int reg_file, address_subreg_nr, indirect_offset;
};
/** /**
* This structure is the internal representation of destination operands in the * This structure is the internal representation of destination operands in the

46
assembler/gram.y
View File

@ -159,7 +159,7 @@ static void brw_program_add_label(struct brw_program *p, const char *label)
struct region region; struct region region;
struct regtype regtype; struct regtype regtype;
struct brw_reg direct_reg; struct brw_reg direct_reg;
struct indirect_reg indirect_reg; struct brw_reg indirect_reg;
struct condition condition; struct condition condition;
struct declared_register symbol_reg; struct declared_register symbol_reg;
imm32_t imm32; imm32_t imm32;
@ -1705,17 +1705,17 @@ dstreg: directgenreg
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
$$.reg_file = $1.reg_file; $$.reg_file = $1.file;
$$.subreg_nr = $1.address_subreg_nr; $$.subreg_nr = $1.subnr;
$$.indirect_offset = $1.indirect_offset; $$.indirect_offset = $1.dw1.bits.indirect_offset;
} }
| indirectmsgreg | indirectmsgreg
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
$$.reg_file = $1.reg_file; $$.reg_file = $1.file;
$$.subreg_nr = $1.address_subreg_nr; $$.subreg_nr = $1.subnr;
$$.indirect_offset = $1.indirect_offset; $$.indirect_offset = $1.dw1.bits.indirect_offset;
} }
; ;
@ -1937,9 +1937,9 @@ indirectsrcoperand:
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
$$.reg_file = $3.reg_file; $$.reg_file = $3.file;
$$.subreg_nr = $3.address_subreg_nr; $$.subreg_nr = $3.subnr;
$$.indirect_offset = $3.indirect_offset; $$.indirect_offset = $3.dw1.bits.indirect_offset;
$$.reg_type = $5.type; $$.reg_type = $5.type;
$$.vert_stride = $4.vert_stride; $$.vert_stride = $4.vert_stride;
$$.width = $4.width; $$.width = $4.width;
@ -1966,14 +1966,14 @@ addrparam: addrreg COMMA immaddroffset
YYERROR; YYERROR;
} }
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.address_subreg_nr = $1.subnr; $$.subnr = $1.subnr;
$$.indirect_offset = $3; $$.dw1.bits.indirect_offset = $3;
} }
| addrreg | addrreg
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.address_subreg_nr = $1.subnr; $$.subnr = $1.subnr;
$$.indirect_offset = 0; $$.dw1.bits.indirect_offset = 0;
} }
; ;
@ -2009,9 +2009,9 @@ directgenreg: GENREG subregnum
indirectgenreg: GENREGFILE LSQUARE addrparam RSQUARE indirectgenreg: GENREGFILE LSQUARE addrparam RSQUARE
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.reg_file = BRW_GENERAL_REGISTER_FILE; $$.file = BRW_GENERAL_REGISTER_FILE;
$$.address_subreg_nr = $3.address_subreg_nr; $$.subnr = $3.subnr;
$$.indirect_offset = $3.indirect_offset; $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset;
} }
; ;
@ -2027,9 +2027,9 @@ directmsgreg: MSGREG subregnum
indirectmsgreg: MSGREGFILE LSQUARE addrparam RSQUARE indirectmsgreg: MSGREGFILE LSQUARE addrparam RSQUARE
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.reg_file = BRW_MESSAGE_REGISTER_FILE; $$.file = BRW_MESSAGE_REGISTER_FILE;
$$.address_subreg_nr = $3.address_subreg_nr; $$.subnr = $3.subnr;
$$.indirect_offset = $3.indirect_offset; $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset;
} }
; ;
@ -2315,9 +2315,9 @@ relativelocation2:
{ {
memset (&$$, '\0', sizeof ($$)); memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
$$.reg_file = $1.reg_file; $$.reg_file = $1.file;
$$.subreg_nr = $1.address_subreg_nr; $$.subreg_nr = $1.subnr;
$$.indirect_offset = $1.indirect_offset; $$.indirect_offset = $1.dw1.bits.indirect_offset;
$$.reg_type = $3.type; $$.reg_type = $3.type;
$$.vert_stride = $2.vert_stride; $$.vert_stride = $2.vert_stride;
$$.width = $2.width; $$.width = $2.width;