mirror of
https://github.com/tiagovignatti/intel-gpu-tools.git
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tests/kms_psr_sink_crc: Create test to test PSR by checking panel CRC.
v2: Wait psr enable with timeout and more subtest added.
v3: Add wait for v_blank leeting test more reliable and preparing to
add Baytrail per-pipe tests.
v4: Call busy_ioctl on mmap_gtt to match the real usage and remove the need
of inactivate on set_domain, what was semantically wrong.
v5: Adding more test cases to cover mmap_gtt with and without followed by
busy ioctl and also without busy and waiting 10 seconds between
set_domain and actual write.
v6: rebase after kms_plane added and debugfs api changed.
Plus adding more test cases.
v7: Some rework and sprite test added
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
This commit is contained in:
Rodrigo Vivi
Rodrigo Vivi
parent
8c4dd1d898
commit
27d37a1f10
@ -62,6 +62,7 @@ else
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kms_flip \
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kms_flip_tiling \
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kms_pipe_crc_basic \
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kms_psr_sink_crc \
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kms_fbc_crc \
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kms_setmode \
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kms_sink_crc_basic \
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@ -67,6 +67,7 @@ TESTS_progs_M = \
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kms_mmio_vs_cs_flip \
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kms_pipe_crc_basic \
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kms_plane \
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kms_psr_sink_crc \
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kms_render \
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kms_setmode \
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pm_lpsp \
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623
tests/kms_psr_sink_crc.c
Normal file
623
tests/kms_psr_sink_crc.c
Normal file
@ -0,0 +1,623 @@
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/*
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* Copyright © 2013 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include <errno.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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#include "drm_fourcc.h"
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#include "ioctl_wrappers.h"
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#include "drmtest.h"
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#include "intel_bufmgr.h"
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#include "intel_batchbuffer.h"
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#include "intel_chipset.h"
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#include "igt_debugfs.h"
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#include "igt_kms.h"
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enum tests {
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TEST_PAGE_FLIP,
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TEST_MMAP_CPU,
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TEST_MMAP_GTT,
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TEST_MMAP_GTT_NO_BUSY,
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TEST_MMAP_GTT_WAITING_NO_BUSY,
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TEST_SETDOMAIN_FLIP_WAIT_WRITE_GTT,
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TEST_SETDOMAIN_FLIP_WAIT_WRITE_CPU,
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TEST_BLT,
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TEST_RENDER,
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TEST_CONTEXT,
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TEST_PAGE_FLIP_AND_MMAP_CPU,
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TEST_PAGE_FLIP_AND_MMAP_GTT,
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TEST_PAGE_FLIP_AND_BLT,
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TEST_PAGE_FLIP_AND_RENDER,
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TEST_PAGE_FLIP_AND_CONTEXT,
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TEST_CURSOR_MOVE,
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TEST_SPRITE,
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};
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typedef struct {
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int drm_fd;
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enum tests test;
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drmModeRes *resources;
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drm_intel_bufmgr *bufmgr;
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drm_intel_context *ctx[2];
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uint32_t devid;
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uint32_t handle[2];
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uint32_t crtc_id;
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uint32_t crtc_idx;
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uint32_t fb_id[3];
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struct kmstest_connector_config config;
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igt_display_t display;
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struct igt_fb fb[2];
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igt_plane_t *plane[2];
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} data_t;
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static const char *tests_str(enum tests test)
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{
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static const char * const testss[] = {
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[TEST_PAGE_FLIP] = "page_flip",
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[TEST_MMAP_CPU] = "mmap_cpu",
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[TEST_MMAP_GTT] = "mmap_gtt",
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[TEST_MMAP_GTT_NO_BUSY] = "mmap_gtt_no_busy",
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[TEST_MMAP_GTT_WAITING_NO_BUSY] = "mmap_gtt_waiting_no_busy",
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[TEST_SETDOMAIN_FLIP_WAIT_WRITE_GTT] = "setdomain_flip_wait_write_gtt",
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[TEST_SETDOMAIN_FLIP_WAIT_WRITE_CPU] = "setdomain_flip_wait_write_cpu",
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[TEST_BLT] = "blt",
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[TEST_RENDER] = "render",
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[TEST_CONTEXT] = "context",
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[TEST_PAGE_FLIP_AND_MMAP_CPU] = "page_flip_and_mmap_cpu",
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[TEST_PAGE_FLIP_AND_MMAP_GTT] = "page_flip_and_mmap_gtt",
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[TEST_PAGE_FLIP_AND_BLT] = "page_flip_and_blt",
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[TEST_PAGE_FLIP_AND_RENDER] = "page_flip_and_render",
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[TEST_PAGE_FLIP_AND_CONTEXT] = "page_flip_and_context",
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[TEST_CURSOR_MOVE] = "cursor_move",
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[TEST_SPRITE] = "sprite",
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};
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return testss[test];
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}
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static uint32_t create_fb(data_t *data,
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int w, int h,
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double r, double g, double b,
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struct igt_fb *fb)
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{
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uint32_t fb_id;
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cairo_t *cr;
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fb_id = igt_create_fb(data->drm_fd, w, h,
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DRM_FORMAT_XRGB8888, true, fb);
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igt_assert(fb_id);
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cr = igt_get_cairo_ctx(data->drm_fd, fb);
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igt_paint_color(cr, 0, 0, w, h, r, g, b);
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igt_assert(cairo_status(cr) == 0);
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cairo_destroy(cr);
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return fb_id;
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}
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static void create_cursor_fb(data_t *data, struct igt_fb *fb)
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{
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cairo_t *cr;
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data->fb_id[2] = igt_create_fb(data->drm_fd, 64, 64,
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DRM_FORMAT_ARGB8888, false,
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fb);
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igt_assert(data->fb_id[2]);
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cr = igt_get_cairo_ctx(data->drm_fd, fb);
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igt_paint_color_alpha(cr, 0, 0, 64, 64, 1.0, 1.0, 1.0, 1.0);
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igt_assert(cairo_status(cr) == 0);
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}
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static bool
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connector_set_mode(data_t *data, drmModeModeInfo *mode, uint32_t fb_id)
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{
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struct kmstest_connector_config *config = &data->config;
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int ret;
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#if 0
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fprintf(stdout, "Using pipe %c, %dx%d\n", pipe_name(config->pipe),
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mode->hdisplay, mode->vdisplay);
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#endif
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ret = drmModeSetCrtc(data->drm_fd,
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config->crtc->crtc_id,
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fb_id,
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0, 0, /* x, y */
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&config->connector->connector_id,
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1,
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mode);
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igt_assert(ret == 0);
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return 0;
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}
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static void display_init(data_t *data)
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{
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igt_display_init(&data->display, data->drm_fd);
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data->resources = drmModeGetResources(data->drm_fd);
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igt_assert(data->resources);
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}
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static void display_fini(data_t *data)
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{
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igt_display_fini(&data->display);
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drmModeSetCursor(data->drm_fd, data->crtc_id, 0, 0, 0);
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drmModeFreeResources(data->resources);
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}
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static void fill_blt(data_t *data, uint32_t handle, unsigned char color)
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{
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drm_intel_bo *dst = gem_handle_to_libdrm_bo(data->bufmgr,
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data->drm_fd,
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"", handle);
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struct intel_batchbuffer *batch;
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batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
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igt_assert(batch);
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BEGIN_BATCH(5);
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OUT_BATCH(COLOR_BLT_CMD);
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OUT_BATCH((1 << 24) | (0xf0 << 16) | 0);
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OUT_BATCH(1 << 16 | 4);
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OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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OUT_BATCH(color);
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ADVANCE_BATCH();
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intel_batchbuffer_flush(batch);
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intel_batchbuffer_free(batch);
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gem_bo_busy(data->drm_fd, handle);
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}
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static void scratch_buf_init(struct igt_buf *buf, drm_intel_bo *bo)
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{
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buf->bo = bo;
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buf->stride = 4096;
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buf->tiling = I915_TILING_X;
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buf->size = 4096;
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}
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static void exec_nop(data_t *data, uint32_t handle, drm_intel_context *context)
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{
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drm_intel_bo *dst;
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struct intel_batchbuffer *batch;
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dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle);
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igt_assert(dst);
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batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
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igt_assert(batch);
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/* add the reloc to make sure the kernel will think we write to dst */
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BEGIN_BATCH(4);
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OUT_BATCH(MI_BATCH_BUFFER_END);
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OUT_BATCH(MI_NOOP);
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OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
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OUT_BATCH(MI_NOOP);
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ADVANCE_BATCH();
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intel_batchbuffer_flush_with_context(batch, context);
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intel_batchbuffer_free(batch);
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}
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static void fill_render(data_t *data, uint32_t handle,
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drm_intel_context *context, unsigned char color)
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{
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drm_intel_bo *src, *dst;
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struct intel_batchbuffer *batch;
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struct igt_buf src_buf, dst_buf;
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const uint8_t buf[4] = { color, color, color, color };
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igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(data->devid);
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igt_skip_on(!rendercopy);
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dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle);
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igt_assert(dst);
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src = drm_intel_bo_alloc(data->bufmgr, "", 4096, 4096);
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igt_assert(src);
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gem_write(data->drm_fd, src->handle, 0, buf, 4);
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scratch_buf_init(&src_buf, src);
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scratch_buf_init(&dst_buf, dst);
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batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
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igt_assert(batch);
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rendercopy(batch, context,
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&src_buf, 0, 0, 1, 1,
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&dst_buf, 0, 0);
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intel_batchbuffer_free(batch);
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gem_bo_busy(data->drm_fd, handle);
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}
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static bool psr_sink_support(data_t *data)
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{
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int ret;
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FILE *file;
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char str[4];
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file = igt_debugfs_fopen("i915_edp_psr_status", "r");
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igt_require(file);
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ret = fscanf(file, "Sink_Support: %s\n", str);
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if (ret == 0)
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igt_skip("i915_edp_psr_status format not supported by this test case\n");
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fclose(file);
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return strcmp(str, "yes") == 0;
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}
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static bool psr_enabled(data_t *data)
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{
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int ret;
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FILE *file;
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char str[4];
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file = igt_debugfs_fopen("i915_edp_psr_status", "r");
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igt_require(file);
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ret = fscanf(file, "Sink_Support: %s\n", str);
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igt_assert(ret != 0);
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ret = fscanf(file, "Source_OK: %s\n", str);
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igt_assert(ret != 0);
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ret = fscanf(file, "Enabled: %s\n", str);
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igt_assert(ret != 0);
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fclose(file);
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return strcmp(str, "yes") == 0;
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}
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static bool wait_psr_entry(data_t *data, int timeout)
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{
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while (timeout--) {
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if (psr_enabled(data))
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return true;
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sleep(1);
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}
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return false;
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}
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static void get_sink_crc(data_t *data, char *crc) {
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int ret;
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FILE *file;
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file = igt_debugfs_fopen("i915_sink_crc_eDP1", "r");
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igt_require(file);
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ret = fscanf(file, "%s\n", crc);
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igt_require(ret > 0);
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fclose(file);
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}
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static void test_crc(data_t *data)
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{
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uint32_t handle = data->handle[0];
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char ref_crc[12];
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char crc[12];
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if (data->test == TEST_CURSOR_MOVE) {
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igt_assert(drmModeSetCursor(data->drm_fd, data->crtc_id,
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handle, 64, 64) == 0);
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igt_assert(drmModeMoveCursor(data->drm_fd, data->crtc_id,
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1, 1) == 0);
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}
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usleep(300000);
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igt_assert(wait_psr_entry(data, 10));
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get_sink_crc(data, ref_crc);
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switch (data->test) {
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void *ptr;
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case TEST_PAGE_FLIP:
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igt_assert(drmModePageFlip(data->drm_fd, data->crtc_id,
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data->fb_id[1], 0, NULL) == 0);
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break;
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case TEST_PAGE_FLIP_AND_MMAP_CPU:
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handle = data->handle[1];
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igt_assert(drmModePageFlip(data->drm_fd, data->crtc_id,
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data->fb_id[1], 0, NULL) == 0);
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case TEST_MMAP_CPU:
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ptr = gem_mmap__cpu(data->drm_fd, handle, 4096, PROT_WRITE);
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gem_set_domain(data->drm_fd, handle,
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I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
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sleep(1);
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memset(ptr, 0, 4);
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munmap(ptr, 4096);
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sleep(1);
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gem_sw_finish(data->drm_fd, handle);
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break;
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case TEST_PAGE_FLIP_AND_MMAP_GTT:
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handle = data->handle[1];
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igt_assert(drmModePageFlip(data->drm_fd, data->crtc_id,
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data->fb_id[1], 0, NULL) == 0);
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case TEST_MMAP_GTT:
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ptr = gem_mmap__gtt(data->drm_fd, handle, 4096, PROT_WRITE);
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gem_set_domain(data->drm_fd, handle,
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I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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memset(ptr, 0xff, 4);
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munmap(ptr, 4096);
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gem_bo_busy(data->drm_fd, handle);
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break;
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case TEST_MMAP_GTT_NO_BUSY:
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ptr = gem_mmap__gtt(data->drm_fd, handle, 4096, PROT_WRITE);
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gem_set_domain(data->drm_fd, handle,
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I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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memset(ptr, 0xff, 4);
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munmap(ptr, 4096);
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break;
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case TEST_MMAP_GTT_WAITING_NO_BUSY:
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ptr = gem_mmap__gtt(data->drm_fd, handle, 4096, PROT_WRITE);
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gem_set_domain(data->drm_fd, handle,
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I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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fprintf(stdout, "Sleeping for 10 sec...\n");
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sleep(10);
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memset(ptr, 0xff, 4);
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munmap(ptr, 4096);
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break;
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case TEST_SETDOMAIN_FLIP_WAIT_WRITE_GTT:
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ptr = gem_mmap__gtt(data->drm_fd, handle, 4096, PROT_WRITE);
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gem_set_domain(data->drm_fd, handle,
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I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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fprintf(stdout, "Sleeping for 10 sec...\n");
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sleep(10);
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fill_blt(data, handle, 0xff);
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igt_assert(wait_psr_entry(data, 10));
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get_sink_crc(data, ref_crc);
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fprintf(stdout, "Sleeping for 10 sec...\n");
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sleep(10);
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memset(ptr, 0xff, 4);
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munmap(ptr, 4096);
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break;
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case TEST_SETDOMAIN_FLIP_WAIT_WRITE_CPU:
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ptr = gem_mmap__cpu(data->drm_fd, handle, 4096, PROT_WRITE);
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gem_set_domain(data->drm_fd, handle,
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I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
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fprintf(stdout, "Sleeping for 10 sec...\n");
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sleep(10);
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fill_blt(data, handle, 0xff);
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igt_assert(wait_psr_entry(data, 10));
|
||||
get_sink_crc(data, ref_crc);
|
||||
fprintf(stdout, "Sleeping for 10 sec...\n");
|
||||
sleep(10);
|
||||
memset(ptr, 0xff, 4);
|
||||
munmap(ptr, 4096);
|
||||
gem_sw_finish(data->drm_fd, handle);
|
||||
break;
|
||||
case TEST_BLT:
|
||||
case TEST_PAGE_FLIP_AND_BLT:
|
||||
fill_blt(data, handle, 0xff);
|
||||
break;
|
||||
case TEST_RENDER:
|
||||
case TEST_CONTEXT:
|
||||
case TEST_PAGE_FLIP_AND_RENDER:
|
||||
case TEST_PAGE_FLIP_AND_CONTEXT:
|
||||
fill_render(data, handle,
|
||||
(data->test == TEST_CONTEXT ||
|
||||
data->test == TEST_PAGE_FLIP_AND_CONTEXT) ?
|
||||
data->ctx[1] : NULL, 0xff);
|
||||
break;
|
||||
case TEST_CURSOR_MOVE:
|
||||
igt_assert(drmModeMoveCursor(data->drm_fd, data->crtc_id, 1, 2) == 0);
|
||||
break;
|
||||
case TEST_SPRITE:
|
||||
igt_plane_set_fb(data->plane[0], &data->fb[0]);
|
||||
igt_display_commit(&data->display);
|
||||
igt_plane_set_fb(data->plane[1], &data->fb[1]);
|
||||
igt_display_commit(&data->display);
|
||||
break;
|
||||
}
|
||||
|
||||
igt_wait_for_vblank(data->drm_fd, data->crtc_idx);
|
||||
|
||||
get_sink_crc(data, crc);
|
||||
igt_assert(strcmp(ref_crc, crc) != 0);
|
||||
}
|
||||
|
||||
static bool prepare_crtc(data_t *data, uint32_t connector_id)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = kmstest_get_connector_config(data->drm_fd,
|
||||
connector_id,
|
||||
1 << data->crtc_idx,
|
||||
&data->config);
|
||||
if (ret)
|
||||
return false;
|
||||
|
||||
data->fb_id[0] = create_fb(data,
|
||||
data->config.default_mode.hdisplay,
|
||||
data->config.default_mode.vdisplay,
|
||||
0.0, 1.0, 0.0, &data->fb[0]);
|
||||
igt_assert(data->fb_id[0]);
|
||||
|
||||
if (data->test == TEST_CURSOR_MOVE)
|
||||
create_cursor_fb(data, &data->fb[0]);
|
||||
|
||||
data->fb_id[1] = create_fb(data,
|
||||
data->config.default_mode.hdisplay,
|
||||
data->config.default_mode.vdisplay,
|
||||
1.0, 0.0, 0.0, &data->fb[1]);
|
||||
igt_assert(data->fb_id[1]);
|
||||
|
||||
data->handle[0] = data->fb[0].gem_handle;
|
||||
data->handle[1] = data->fb[1].gem_handle;
|
||||
|
||||
/* scanout = fb[1] */
|
||||
connector_set_mode(data, &data->config.default_mode,
|
||||
data->fb_id[1]);
|
||||
|
||||
if (data->test == TEST_CONTEXT ||
|
||||
data->test == TEST_PAGE_FLIP_AND_CONTEXT) {
|
||||
data->ctx[0] = drm_intel_gem_context_create(data->bufmgr);
|
||||
igt_require(data->ctx[0]);
|
||||
data->ctx[1] = drm_intel_gem_context_create(data->bufmgr);
|
||||
igt_require(data->ctx[1]);
|
||||
|
||||
exec_nop(data, data->handle[0], data->ctx[1]);
|
||||
exec_nop(data, data->handle[0], data->ctx[0]);
|
||||
exec_nop(data, data->handle[0], data->ctx[1]);
|
||||
exec_nop(data, data->handle[0], data->ctx[0]);
|
||||
}
|
||||
|
||||
/* scanout = fb[0] */
|
||||
connector_set_mode(data, &data->config.default_mode,
|
||||
data->fb_id[0]);
|
||||
|
||||
if (data->test == TEST_CONTEXT ||
|
||||
data->test == TEST_PAGE_FLIP_AND_CONTEXT) {
|
||||
exec_nop(data, data->fb[0].gem_handle, data->ctx[0]);
|
||||
}
|
||||
|
||||
kmstest_free_connector_config(&data->config);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static void finish_crtc(data_t *data)
|
||||
{
|
||||
if (data->test == TEST_CONTEXT ||
|
||||
data->test == TEST_PAGE_FLIP_AND_CONTEXT) {
|
||||
drm_intel_gem_context_destroy(data->ctx[0]);
|
||||
drm_intel_gem_context_destroy(data->ctx[1]);
|
||||
}
|
||||
}
|
||||
|
||||
static void test_sprite(data_t *data)
|
||||
{
|
||||
igt_display_t *display = &data->display;
|
||||
igt_output_t *output;
|
||||
drmModeModeInfo *mode;
|
||||
|
||||
igt_skip_on(IS_HASWELL(data->devid));
|
||||
|
||||
for_each_connected_output(display, output) {
|
||||
drmModeConnectorPtr c = output->config.connector;
|
||||
|
||||
if (c->connector_type != DRM_MODE_CONNECTOR_eDP ||
|
||||
c->connection != DRM_MODE_CONNECTED)
|
||||
continue;
|
||||
|
||||
igt_output_set_pipe(output, PIPE_ANY);
|
||||
|
||||
mode = igt_output_get_mode(output);
|
||||
|
||||
igt_create_color_fb(data->drm_fd,
|
||||
mode->hdisplay, mode->vdisplay,
|
||||
DRM_FORMAT_XRGB8888, true, /* tiled */
|
||||
0.0, 1.0, 0.0,
|
||||
&data->fb[0]);
|
||||
|
||||
igt_create_color_fb(data->drm_fd,
|
||||
mode->hdisplay/2, mode->vdisplay/2,
|
||||
DRM_FORMAT_XRGB8888, true, /* tiled */
|
||||
1.0, 0.0, 0.0,
|
||||
&data->fb[1]);
|
||||
|
||||
data->plane[0] = igt_output_get_plane(output, 0);
|
||||
data->plane[1] = igt_output_get_plane(output, 1);
|
||||
|
||||
test_crc(data);
|
||||
}
|
||||
}
|
||||
|
||||
static void run_test(data_t *data)
|
||||
{
|
||||
int i, n;
|
||||
drmModeConnectorPtr c;
|
||||
/* Baytrail supports per-pipe PSR configuration, however PSR on
|
||||
* PIPE_B isn't working properly. So let's keep it disabled for now.
|
||||
* crtcs = IS_VALLEYVIEW(data->devid)? 2 : 1; */
|
||||
int crtcs = 1;
|
||||
|
||||
if (data->test == TEST_SPRITE) {
|
||||
test_sprite(data);
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < data->resources->count_connectors; i++) {
|
||||
uint32_t connector_id = data->resources->connectors[i];
|
||||
c = drmModeGetConnector(data->drm_fd, connector_id);
|
||||
|
||||
if (c->connector_type != DRM_MODE_CONNECTOR_eDP ||
|
||||
c->connection != DRM_MODE_CONNECTED)
|
||||
continue;
|
||||
for (n = 0; n < crtcs; n++) {
|
||||
data->crtc_idx = n;
|
||||
data->crtc_id = data->resources->crtcs[n];
|
||||
|
||||
if (!prepare_crtc(data, connector_id))
|
||||
continue;
|
||||
|
||||
test_crc(data);
|
||||
|
||||
finish_crtc(data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
igt_main
|
||||
{
|
||||
data_t data = {};
|
||||
enum tests test;
|
||||
|
||||
igt_skip_on_simulation();
|
||||
|
||||
igt_fixture {
|
||||
data.drm_fd = drm_open_any();
|
||||
igt_set_vt_graphics_mode();
|
||||
|
||||
data.devid = intel_get_drm_devid(data.drm_fd);
|
||||
|
||||
igt_assert(psr_sink_support(&data));
|
||||
|
||||
data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
|
||||
igt_assert(data.bufmgr);
|
||||
drm_intel_bufmgr_gem_enable_reuse(data.bufmgr);
|
||||
|
||||
display_init(&data);
|
||||
}
|
||||
|
||||
for (test = TEST_PAGE_FLIP; test <= TEST_SPRITE; test++) {
|
||||
igt_subtest_f("%s", tests_str(test)) {
|
||||
data.test = test;
|
||||
run_test(&data);
|
||||
}
|
||||
}
|
||||
|
||||
igt_fixture {
|
||||
drm_intel_bufmgr_destroy(data.bufmgr);
|
||||
display_fini(&data);
|
||||
}
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user