add VLV punit & north cluster read tools

lib/Makefile.am

@@ -30,6 +30,7 @@ libintel_tools_la_SOURCES = 	\
 	rendercopy.h		\
 	intel_reg_map.c		\
 	intel_dpio.c		\
+	intel_iosf.c		\
 	$(NULL)
 
 LDADD = $(CAIRO_LIBS)

lib/intel_gpu_tools.h

@@ -49,6 +49,9 @@ void intel_register_write(uint32_t reg, uint32_t val);
 uint32_t intel_dpio_reg_read(uint32_t reg);
 void intel_dpio_reg_write(uint32_t reg, uint32_t val);
 
+int intel_punit_read(uint8_t addr, uint32_t *val);
+int intel_nc_read(uint8_t addr, uint32_t *val);
+
 #define INTEL_RANGE_RSVD	(0<<0) /*  Shouldn't be read or written */
 #define INTEL_RANGE_READ	(1<<0)
 #define INTEL_RANGE_WRITE	(1<<1)

lib/intel_iosf.c

@@ -0,0 +1,85 @@
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <err.h>
+#include <errno.h>
+#include "intel_gpu_tools.h"
+
+#define TIMEOUT_US 500000
+
+static int vlv_punit_rw(uint32_t port, uint8_t opcode, uint8_t addr,
+			uint32_t *val)
+{
+	volatile uint32_t *ptr;
+	int timeout = 0;
+	uint32_t cmd, devfn, be, bar;
+
+	bar = 0;
+	be = 0xf;
+	devfn = 16;
+
+	cmd = (devfn << IOSF_DEVFN_SHIFT) | (opcode << IOSF_OPCODE_SHIFT) |
+		(port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
+		(bar << IOSF_BAR_SHIFT);
+
+	ptr = (volatile uint32_t*)((volatile char*)mmio +
+				   VLV_IOSF_DOORBELL_REQ);
+
+	if (*ptr & IOSF_SB_BUSY) {
+		fprintf(stderr, "warning: pcode (%s) mailbox access failed\n",
+			opcode == PUNIT_OPCODE_REG_READ ?
+			"read" : "write");
+		return -EAGAIN;
+	}
+
+	ptr = (volatile uint32_t*)((volatile char*)mmio + VLV_IOSF_ADDR);
+	*ptr = addr;
+	if (opcode == PUNIT_OPCODE_REG_WRITE) {
+		ptr = (volatile uint32_t*)((volatile char*)mmio +
+					   VLV_IOSF_DATA);
+		*ptr = *val;
+	}
+	ptr = (volatile uint32_t*)((volatile char*)mmio +
+				   VLV_IOSF_DOORBELL_REQ);
+	*ptr = cmd;
+	do {
+		usleep(1);
+		timeout++;
+	} while ((*ptr & IOSF_SB_BUSY) && timeout < TIMEOUT_US);
+
+	if (timeout >= TIMEOUT_US) {
+		fprintf(stderr, "timeout waiting for pcode %s (%d) to finish\n",
+			opcode == PUNIT_OPCODE_REG_READ ? "read" : "write",
+			addr);
+		return -ETIMEDOUT;
+	}
+
+	if (opcode == PUNIT_OPCODE_REG_READ) {
+		ptr = (volatile uint32_t*)((volatile char*)mmio +
+					   VLV_IOSF_DATA);
+		*val = *ptr;
+	}
+	*ptr = 0;
+
+	return 0;
+}
+
+int intel_punit_read(uint8_t addr, uint32_t *val)
+{
+	return vlv_punit_rw(IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_READ, addr, val);
+}
+
+int intel_punit_write(uint8_t addr, uint32_t val)
+{
+	return vlv_punit_rw(IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_WRITE, addr, &val);
+}
+
+int intel_nc_read(uint8_t addr, uint32_t *val)
+{
+	return vlv_punit_rw(IOSF_PORT_NC, PUNIT_OPCODE_REG_READ, addr, val);
+}
+
+int intel_nc_write(uint8_t addr, uint32_t val)
+{
+	return vlv_punit_rw(IOSF_PORT_NC, PUNIT_OPCODE_REG_WRITE, addr, &val);
+}

lib/intel_reg.h

@@ -3798,4 +3798,20 @@ typedef enum {
 #define DPIO_DATA			0x2104
 #define DPIO_REG			0x2108
 
+/* VLV IOSF access */
+#define VLV_IOSF_DOORBELL_REQ			0x182100
+#define   IOSF_DEVFN_SHIFT			24
+#define   IOSF_OPCODE_SHIFT			16
+#define   IOSF_PORT_SHIFT			8
+#define   IOSF_BYTE_ENABLES_SHIFT		4
+#define   IOSF_BAR_SHIFT			1
+#define   IOSF_SB_BUSY				(1<<0)
+#define   IOSF_PORT_PUNIT			0x4
+#define   IOSF_PORT_NC				0x11
+#define VLV_IOSF_DATA				0x182104
+#define VLV_IOSF_ADDR				0x182108
+
+#define PUNIT_OPCODE_REG_READ			6
+#define PUNIT_OPCODE_REG_WRITE			7
+
 #endif /* _I810_REG_H */