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https://github.com/tiagovignatti/intel-gpu-tools.git
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igt/gem_busy: Use a boatload of store-dwords to force ring busyness
A little more inelegant as we can't control the delay very well, but it should prove more vesatile and broaden the test coverge (and still be quick enough for basic). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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123
tests/gem_busy.c
123
tests/gem_busy.c
@ -28,6 +28,18 @@ IGT_TEST_DESCRIPTION("Basic check of busy-ioctl ABI.");
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enum { TEST = 0, BUSY, BATCH };
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static bool gem_busy(int fd, uint32_t handle)
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{
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struct drm_i915_gem_busy busy;
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memset(&busy, 0, sizeof(busy));
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busy.handle = handle;
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do_ioctl(fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
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return busy.busy != 0;
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}
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static void __gem_busy(int fd,
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uint32_t handle,
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uint32_t *read,
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@ -153,7 +165,7 @@ static bool still_busy(int fd, uint32_t handle)
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return write;
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}
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static void test_ring(int fd, unsigned ring, uint32_t flags)
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static void semaphore(int fd, unsigned ring, uint32_t flags)
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{
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uint32_t bbe = MI_BATCH_BUFFER_END;
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uint32_t handle[3];
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@ -208,6 +220,84 @@ static void test_ring(int fd, unsigned ring, uint32_t flags)
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gem_close(fd, handle[i]);
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}
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static void store(int fd, unsigned ring, uint32_t flags)
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{
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const int gen = intel_gen(intel_get_drm_devid(fd));
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struct drm_i915_gem_exec_object2 obj[2];
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struct drm_i915_gem_relocation_entry reloc;
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struct drm_i915_gem_execbuffer2 execbuf;
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uint32_t read[2], write[2];
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struct timespec tv;
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uint32_t batch[16];
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int i, count;
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gem_require_ring(fd, ring | flags);
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igt_skip_on_f(gen == 6 && (ring & ~(3<<13)) == I915_EXEC_BSD,
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"MI_STORE_DATA broken on gen6 bsd\n");
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memset(&execbuf, 0, sizeof(execbuf));
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execbuf.buffers_ptr = (uintptr_t)obj;
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execbuf.buffer_count = 2;
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execbuf.flags = ring | flags;
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if (gen < 6)
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execbuf.flags |= I915_EXEC_SECURE;
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memset(obj, 0, sizeof(obj));
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obj[0].handle = gem_create(fd, 4096);
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obj[1].handle = gem_create(fd, 4096);
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memset(&reloc, 0, sizeof(reloc));
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reloc.target_handle = obj[0].handle;
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reloc.presumed_offset = 0;
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reloc.offset = sizeof(uint32_t);
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reloc.delta = 0;
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reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
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reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
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obj[1].relocs_ptr = (uintptr_t)&reloc;
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obj[1].relocation_count = 1;
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i = 0;
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batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
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if (gen >= 8) {
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batch[++i] = 0;
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batch[++i] = 0;
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} else if (gen >= 4) {
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batch[++i] = 0;
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batch[++i] = 0;
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reloc.offset += sizeof(uint32_t);
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} else {
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batch[i]--;
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batch[++i] = 0;
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}
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batch[++i] = 0xc0ffee;
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batch[++i] = MI_BATCH_BUFFER_END;
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gem_write(fd, obj[1].handle, 0, batch, sizeof(batch));
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count = 16;
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do {
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for (i = 0; i < count; i++)
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gem_execbuf(fd, &execbuf);
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__gem_busy(fd, obj[0].handle, &read[0], &write[0]);
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__gem_busy(fd, obj[1].handle, &read[1], &write[1]);
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count <<= 1;
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} while (read[0] == 0 || read[1] == 0);
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igt_assert_eq(write[0], ring);
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igt_assert_eq(read[0], 1 << ring);
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igt_assert_eq(write[1], 0);
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igt_assert_eq(read[1], 1 << ring);
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/* Calling busy in a loop should be enough to flush the rendering */
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memset(&tv, 0, sizeof(tv));
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while (gem_busy(fd, obj[1].handle))
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igt_assert(igt_seconds_elapsed(&tv) < 2);
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igt_assert(!gem_busy(fd, obj[0].handle));
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gem_close(fd, obj[1].handle);
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gem_close(fd, obj[0].handle);
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}
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static bool has_semaphores(int fd)
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{
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struct drm_i915_getparam gp;
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@ -230,17 +320,32 @@ igt_main
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igt_skip_on_simulation();
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igt_fixture {
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fd = drm_open_driver(DRIVER_INTEL);
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igt_require(has_semaphores(fd));
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igt_fixture
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fd = drm_open_driver_master(DRIVER_INTEL);
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igt_subtest_group {
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for (e = intel_execution_engines; e->name; e++) {
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/* default exec-id is purely symbolic */
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if (e->exec_id == 0)
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continue;
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igt_subtest_f("basic-%s", e->name)
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store(fd, e->exec_id, e->flags);
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}
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}
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for (e = intel_execution_engines; e->name; e++) {
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if (e->exec_id == 0) /* default exec-id is purely symbolic */
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continue;
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igt_subtest_group {
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igt_fixture
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igt_require(has_semaphores(fd));
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igt_subtest_f("%s", e->name)
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test_ring(fd, e->exec_id, e->flags);
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for (e = intel_execution_engines; e->name; e++) {
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/* default exec-id is purely symbolic */
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if (e->exec_id == 0)
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continue;
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igt_subtest_f("semaphore-%s", e->name)
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semaphore(fd, e->exec_id, e->flags);
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}
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}
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igt_fixture
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