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tests/gem_bad_blit.c : Fix dst address for Gen8 onwards

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Gen8 Onwards use 48 bit addressing for src and dst base
addresses. This patch fixes this for destination base address.

Signed-off-by: Praveen Paneri <praveen.paneri@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Praveen Paneri 2015-02-25 14:26:21 +05:30 committed by Daniel Vetter
parent c6d18ee56b
commit 0f3a5809e7
1 changed files with 2 additions and 0 deletions
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tests/gem_bad_blit.c
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@ -85,6 +85,8 @@ bad_blit(drm_intel_bo *src_bo, uint32_t devid)
OUT_BATCH(0); /* dst x1,y1 */
OUT_BATCH((64 << 16) | 64); /* 64x64 blit */
OUT_BATCH(BAD_GTT_DEST);
if (batch->gen >= 8)
OUT_BATCH(BAD_GTT_DEST >> 32); /* Upper 16 bits */
OUT_BATCH(0); /* src x1,y1 */
OUT_BATCH(src_pitch);
OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);