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Update dpio read/write to take in extra PHY parameter.

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The extra parameter is for future platform.

Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
This commit is contained in:
Chon Ming Lee
2013-12-04 20:44:33 +08:00
committed by Ville Syrjälä
parent f5643c4a27
commit 0b67c0c421
7 changed files with 26 additions and 13 deletions
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tools/quick_dump/chipset.i
+2 -2
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@@ -16,7 +16,7 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
extern void intel_register_access_fini();
extern int intel_register_access_needs_fakewake();
extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
extern uint32_t intel_dpio_reg_read(uint32_t reg);
extern uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
%}
extern int is_sandybridge(unsigned short pciid);
@@ -30,4 +30,4 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
extern void intel_register_access_fini();
extern int intel_register_access_needs_fakewake();
extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
extern uint32_t intel_dpio_reg_read(uint32_t reg);
extern uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
tools/quick_dump/quick_dump.py
+1 -1
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@@ -21,7 +21,7 @@ def parse_file(file):
for line in file:
register = ast.literal_eval(line)
if register[2] == 'DPIO':
val = reg.dpio_read(register[1])
val = reg.dpio_read(register[1], 0)
else:
val = reg.read(register[1])
intreg = int(register[1], 16)
tools/quick_dump/reg_access.py
+4 -2
View File
@@ -27,9 +27,11 @@ def get_wake():
mt_forcewake_get()
vlv_forcewake_get()
def dpio_read(reg):
def dpio_read(reg, phy):
reg = int(reg, 16)
val = chipset.intel_dpio_reg_read(reg)
phy = int(phy)
val = chipset.intel_dpio_reg_read(reg, phy)
return val