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igt.cocci: Replace igt_assert() with igt_assert_CMP() where possible

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The integer comparison macros give us better error output by including
the actual values that failed the comparison.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
This commit is contained in:
Matt Roper 2015-03-05 15:01:00 -08:00 committed by Daniel Vetter
parent 14a3d88a09
commit 07be8fec15
53 changed files with 288 additions and 252 deletions
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32
lib/igt.cocci
View File

@ -141,3 +141,35 @@ a = drm_open_any();
- return ...;
- }
)
// Use comparison macros instead of raw igt_assert when possible
@@
typedef uint32_t;
uint32_t E1, E2;
int E3, E4;
@@
(
- igt_assert(E1 == E2);
+ igt_assert_eq_u32(E1, E2);
|
- igt_assert(E1 != E2);
+ igt_assert_neq_u32(E1, E2);
|
- igt_assert(E1 <= E2);
+ igt_assert_lte_u32(E1, E2);
|
- igt_assert(E1 < E2);
+ igt_assert_lt_u32(E1, E2);
|
- igt_assert(E3 == E4);
+ igt_assert_eq(E3, E4);
|
- igt_assert(E3 != E4);
+ igt_assert_neq(E3, E4);
|
- igt_assert(E3 <= E4);
+ igt_assert_lte(E3, E4);
|
- igt_assert(E3 < E4);
+ igt_assert_lt(E3, E4);
)

26
tests/drv_hangman.c
View File

@ -79,14 +79,15 @@ static void test_sysfs_error_exists(void)
{
char tmp[1024];
igt_assert(read_sysfs(tmp, sizeof(tmp), "error") > 0);
igt_assert_lt(0, read_sysfs(tmp, sizeof(tmp), "error"));
}
static void test_debugfs_error_state_exists(void)
{
int fd;
igt_assert((fd = igt_debugfs_open("i915_error_state", O_RDONLY)) >= 0);
igt_assert_lte(0,
(fd = igt_debugfs_open("i915_error_state", O_RDONLY)));
close (fd);
}
@ -95,7 +96,7 @@ static void test_debugfs_ring_stop_exists(void)
{
int fd;
igt_assert((fd = igt_debugfs_open("i915_ring_stop", O_RDONLY)) >= 0);
igt_assert_lte(0, (fd = igt_debugfs_open("i915_ring_stop", O_RDONLY)));
close(fd);
}
@ -105,10 +106,10 @@ static void read_dfs(const char *fname, char *d, int maxlen)
int fd;
int l;
igt_assert((fd = igt_debugfs_open(fname, O_RDONLY)) >= 0);
igt_assert_lte(0, (fd = igt_debugfs_open(fname, O_RDONLY)));
igt_assert((l = read(fd, d, maxlen-1)) > 0);
igt_assert(l < maxlen);
igt_assert_lt(0, (l = read(fd, d, maxlen - 1)));
igt_assert_lt(l, maxlen);
d[l] = 0;
close(fd);
@ -210,7 +211,8 @@ static void clear_error_state(void)
int fd;
const char *b = "1";
igt_assert((fd = igt_debugfs_open("i915_error_state", O_WRONLY)) >= 0);
igt_assert_lte(0,
(fd = igt_debugfs_open("i915_error_state", O_WRONLY)));
igt_assert(write(fd, b, 1) == 1);
close(fd);
}
@ -244,7 +246,7 @@ static void check_error_state(const int gen,
bool bb_ok = false, req_ok = false, ringbuf_ok = false;
debug_fd = igt_debugfs_open("i915_error_state", O_RDONLY);
igt_assert(debug_fd >= 0);
igt_assert_lte(0, debug_fd);
file = fdopen(debug_fd, "r");
while (getline(&line, &line_size, file) > 0) {
@ -287,7 +289,7 @@ static void check_error_state(const int gen,
req_matched = sscanf(dashes, "--- %d requests\n", &requests);
if (req_matched == 1) {
igt_assert(strstr(ring_name, expected_ring_name));
igt_assert(requests > 0);
igt_assert_lt(0, requests);
for (i = 0; i < requests; i++) {
uint32_t seqno;
@ -296,7 +298,7 @@ static void check_error_state(const int gen,
igt_assert(getline(&line, &line_size, file) > 0);
items = sscanf(line, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
&seqno, &jiffies, &tail);
igt_assert(items == 3);
igt_assert_eq(items, 3);
}
req_ok = true;
continue;
@ -315,12 +317,12 @@ static void check_error_state(const int gen,
igt_assert(getline(&line, &line_size, file) > 0);
items = sscanf(line, "%08x : %08x\n",
&offset, &command);
igt_assert(items == 2);
igt_assert_eq(items, 2);
if ((command & 0x1F800000) == MI_BATCH_BUFFER_START) {
igt_assert(getline(&line, &line_size, file) > 0);
items = sscanf(line, "%08x : %08x\n",
&offset, &expected_addr);
igt_assert(items == 2);
igt_assert_eq(items, 2);
i++;
}
}

2
tests/drv_suspend.c
View File

@ -165,7 +165,7 @@ test_forcewake(bool hibernate)
int fw_fd;
fw_fd = igt_open_forcewake_handle();
igt_assert(fw_fd >= 0);
igt_assert_lte(0, fw_fd);
if (hibernate)
igt_system_hibernate_autoresume();

10
tests/eviction_common.c
View File

@ -89,7 +89,7 @@ static int minor_evictions(int fd, struct igt_eviction_test_ops *ops,
for (n = 0; n < nr_surfaces; n++, m += 7)
sel[n] = bo[m%total_surfaces];
ret = ops->copy(fd, sel[0], sel[1], sel, nr_surfaces);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
ret = ops->copy(fd, bo[0], bo[0], bo, total_surfaces);
igt_assert(ret == ENOSPC);
@ -120,7 +120,7 @@ static int major_evictions(int fd, struct igt_eviction_test_ops *ops,
for (loop = 0, m = 0; loop < 100; loop++, m += 17) {
n = m % nr_surfaces;
ret = ops->copy(fd, bo[n], bo[n], &bo[n], 1);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
for (n = 0; n < nr_surfaces; n++)
@ -156,7 +156,7 @@ static int swapping_evictions(int fd, struct igt_eviction_test_ops *ops,
for (pass = 0; pass < 100; pass++) {
ret = ops->copy(fd, bo[0], bo[1], bo, working_surfaces);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
}
@ -186,7 +186,7 @@ static int forking_evictions(int fd, struct igt_eviction_test_ops *ops,
} else
bo_count = working_surfaces;
igt_assert(working_surfaces <= bo_count);
igt_assert_lte(working_surfaces, bo_count);
intel_require_memory(bo_count, surface_size, CHECK_RAM | CHECK_SWAP);
bo = malloc(bo_count*sizeof(*bo));
@ -223,7 +223,7 @@ static int forking_evictions(int fd, struct igt_eviction_test_ops *ops,
for (pass = 0; pass < num_passes; pass++) {
ret = ops->copy(realfd, bo[0], bo[1], bo, working_surfaces);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
for (l = 0; l < working_surfaces &&
(flags & FORKING_EVICTIONS_MEMORY_PRESSURE);

2
tests/gem_close_race.c
View File

@ -140,7 +140,7 @@ static void run(int child)
int fd;
fd = open(device, O_RDWR);
igt_assert(fd != -1);
igt_assert_neq(fd, -1);
handle = load(fd);
if ((child & 63) == 63)

2
tests/gem_cs_prefetch.c
View File

@ -90,7 +90,7 @@ static void exec(int fd, uint32_t handle)
DRM_IOCTL_I915_GEM_EXECBUFFER2,
&execbuf);
gem_sync(fd, handle);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
igt_simple_main

3
tests/gem_cs_tlb.c
View File

@ -130,7 +130,8 @@ static void run_on_ring(int fd, unsigned ring_id, const char *ring_name)
gem_close(fd, handle);
}
igt_assert(exec(fd, handle_new, split, &gtt_offset_new, 0) == 0);
igt_assert_eq(exec(fd, handle_new, split, &gtt_offset_new, 0),
0);
if (split > 0) {
/* Check that we've managed to collide in the tlb. */

4
tests/gem_ctx_basic.c
View File

@ -85,7 +85,7 @@ static void *work(void *arg)
else
td_fd = fd;
igt_assert(td_fd >= 0);
igt_assert_lte(0, td_fd);
bufmgr = drm_intel_bufmgr_gem_init(td_fd, 4096);
batch = intel_batchbuffer_alloc(bufmgr, devid);
@ -105,7 +105,7 @@ static void *work(void *arg)
} else {
int ret;
ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
intel_batchbuffer_flush_with_context(batch, context);
}
}

2
tests/gem_evict_alignment.c
View File

@ -127,7 +127,7 @@ copy(int fd, uint32_t dst, uint32_t src, uint32_t *all_bo, int n_bo, int alignme
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
if (ret)
ret = errno;
igt_assert(ret == error);
igt_assert_eq(ret, error);
gem_close(fd, handle);
free(obj);

2
tests/gem_exec_bad_domains.c
View File

@ -75,7 +75,7 @@ run_batch(void)
used = batch->ptr - batch->buffer;
ret = drm_intel_bo_subdata(batch->bo, 0, used, batch->buffer);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
batch->ptr = NULL;

4
tests/gem_exec_blt.c
View File

@ -60,7 +60,7 @@ static int gem_linear_blt(int fd,
uint32_t *b = batch;
int height = length / (16 * 1024);
igt_assert(height <= 1<<16);
igt_assert_lte(height, 1 << 16);
if (height) {
int i = 0;
@ -180,7 +180,7 @@ static uint32_t dumb_create(int fd)
arg.height = 32;
ret = drmIoctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &arg);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(arg.size >= 4096);
return arg.handle;

2
tests/gem_exec_faulting_reloc.c
View File

@ -70,7 +70,7 @@ static int gem_linear_blt(uint32_t *batch,
uint32_t *b = batch;
int height = length / (16 * 1024);
igt_assert(height <= 1<<16);
igt_assert_lte(height, 1 << 16);
if (height) {
int i = 0;

2
tests/gem_exec_nop.c
View File

@ -97,7 +97,7 @@ static void loop(int fd, uint32_t handle, unsigned ring_id, const char *ring_nam
struct timeval start, end;
gettimeofday(&start, NULL);
igt_assert(exec(fd, handle, count, ring_id) == 0);
igt_assert_eq(exec(fd, handle, count, ring_id), 0);
gettimeofday(&end, NULL);
igt_info("Time to exec x %d: %7.3fµs (ring=%s)\n",
count, elapsed(&start, &end, count), ring_name);

4
tests/gem_fence_thrash.c
View File

@ -114,7 +114,7 @@ _bo_write_verify(struct test *t)
const char *tile_str[] = { "none", "x", "y" };
igt_assert(t->tiling >= 0 && t->tiling <= I915_TILING_Y);
igt_assert(t->num_surfaces > 0);
igt_assert_lt(0, t->num_surfaces);
s = calloc(sizeof(*s), t->num_surfaces);
igt_assert(s);
@ -171,7 +171,7 @@ static int run_test(int threads_per_fence, void *f, int tiling,
t.num_surfaces = surfaces_per_thread;
num_fences = gem_available_fences(t.fd);
igt_assert(num_fences > 0);
igt_assert_lt(0, num_fences);
num_threads = threads_per_fence * num_fences;

20
tests/gem_flink.c
View File

@ -50,15 +50,15 @@ test_flink(int fd)
memset(&create, 0, sizeof(create));
create.size = 16 * 1024;
ret = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
flink.handle = create.handle;
ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
open_struct.name = flink.name;
ret = ioctl(fd, DRM_IOCTL_GEM_OPEN, &open_struct);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(open_struct.handle != 0);
}
@ -75,15 +75,15 @@ test_double_flink(int fd)
memset(&create, 0, sizeof(create));
create.size = 16 * 1024;
ret = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
flink.handle = create.handle;
ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
flink2.handle = create.handle;
ret = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink2);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(flink2.name == flink.name);
}
@ -129,15 +129,15 @@ test_flink_lifetime(int fd)
memset(&create, 0, sizeof(create));
create.size = 16 * 1024;
ret = ioctl(fd2, DRM_IOCTL_I915_GEM_CREATE, &create);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
flink.handle = create.handle;
ret = ioctl(fd2, DRM_IOCTL_GEM_FLINK, &flink);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
open_struct.name = flink.name;
ret = ioctl(fd, DRM_IOCTL_GEM_OPEN, &open_struct);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(open_struct.handle != 0);
close(fd2);
@ -145,7 +145,7 @@ test_flink_lifetime(int fd)
open_struct.name = flink.name;
ret = ioctl(fd2, DRM_IOCTL_GEM_OPEN, &open_struct);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(open_struct.handle != 0);
}

8
tests/gem_flink_race.c
View File

@ -61,7 +61,7 @@ static int get_object_count(void)
file = igt_debugfs_fopen("i915_gem_objects", "r");
scanned = fscanf(file, "%i objects", &ret);
igt_assert(scanned == 1);
igt_assert_eq(scanned, 1);
return ret;
}
@ -107,7 +107,7 @@ static void test_flink_name(void)
for (i = 0; i < num_threads; i++) {
r = pthread_create(&threads[i], NULL,
thread_fn_flink_name, NULL);
igt_assert(r == 0);
igt_assert_eq(r, 0);
}
for (i = 0; i < 1000000; i++) {
@ -176,7 +176,7 @@ static void test_flink_close(void)
for (i = 0; i < num_threads; i++) {
r = pthread_create(&threads[i], NULL,
thread_fn_flink_close, NULL);
igt_assert(r == 0);
igt_assert_eq(r, 0);
}
sleep(5);
@ -196,7 +196,7 @@ static void test_flink_close(void)
close(fake);
igt_assert(obj_count == 0);
igt_assert_eq(obj_count, 0);
}
igt_main

2
tests/gem_gtt_hog.c
View File

@ -149,7 +149,7 @@ static void run(data_t *data, int child)
x = ptr[rand() % (size / 4)];
munmap(ptr, size);
igt_assert(x == canary);
igt_assert_eq_u32(x, canary);
}
igt_simple_main

2
tests/gem_linear_blits.c
View File

@ -153,7 +153,7 @@ copy(int fd, uint32_t dst, uint32_t src)
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
gem_close(fd, handle);
}

2
tests/gem_persistent_relocs.c
View File

@ -105,7 +105,7 @@ static drm_intel_bo *create_special_bo(void)
BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
BATCH(0);
}
igt_assert(len % 2 == 0);
igt_assert_eq(len % 2, 0);
BATCH(MI_NOOP);
BATCH(MI_BATCH_BUFFER_END);

2
tests/gem_reloc_vs_gpu.c
View File

@ -100,7 +100,7 @@ static void create_special_bo(void)
BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
BATCH(0);
}
igt_assert(len % 2 == 0);
igt_assert_eq(len % 2, 0);
BATCH(MI_NOOP);
BATCH(MI_BATCH_BUFFER_END);

100
tests/gem_reset_stats.c
View File

@ -243,7 +243,7 @@ static int inject_hang_ring(int fd, int ctx, int ring, bool ignore_ban_error)
i915_execbuffer2_set_context_id(execbuf, ctx);
execbuf.rsvd2 = 0;
igt_assert(gem_exec(fd, &execbuf) == 0);
igt_assert_eq(gem_exec(fd, &execbuf), 0);
gtt_off = exec.offset;
@ -284,7 +284,7 @@ static int inject_hang_ring(int fd, int ctx, int ring, bool ignore_ban_error)
i915_execbuffer2_set_context_id(execbuf, ctx);
execbuf.rsvd2 = 0;
igt_assert(gem_exec(fd, &execbuf) == 0);
igt_assert_eq(gem_exec(fd, &execbuf), 0);
igt_assert(gtt_off == exec.offset);
@ -342,8 +342,8 @@ static void test_rs(int num_fds, int hang_index, int rs_assumed_no_hang)
int fd[MAX_FD];
int h[MAX_FD];
igt_assert (num_fds <= MAX_FD);
igt_assert (hang_index < MAX_FD);
igt_assert_lte(num_fds, MAX_FD);
igt_assert_lt(hang_index, MAX_FD);
for (i = 0; i < num_fds; i++) {
fd[i] = drm_open_any();
@ -391,11 +391,11 @@ static void test_rs_ctx(int num_fds, int num_ctx, int hang_index,
int h[MAX_FD][MAX_CTX];
int ctx[MAX_FD][MAX_CTX];
igt_assert (num_fds <= MAX_FD);
igt_assert (hang_index < MAX_FD);
igt_assert_lte(num_fds, MAX_FD);
igt_assert_lt(hang_index, MAX_FD);
igt_assert (num_ctx <= MAX_CTX);
igt_assert (hang_context < MAX_CTX);
igt_assert_lte(num_ctx, MAX_CTX);
igt_assert_lt(hang_context, MAX_CTX);
test_rs(num_fds, -1, RS_NO_ERROR);
@ -482,15 +482,15 @@ static void test_ban(void)
assert_reset_status(fd_good, 0, RS_NO_ERROR);
h1 = exec_valid(fd_bad, 0);
igt_assert(h1 >= 0);
igt_assert_lte(0, h1);
h5 = exec_valid(fd_good, 0);
igt_assert(h5 >= 0);
igt_assert_lte(0, h5);
assert_reset_status(fd_bad, 0, RS_NO_ERROR);
assert_reset_status(fd_good, 0, RS_NO_ERROR);
h2 = inject_hang_no_ban_error(fd_bad, 0);
igt_assert(h2 >= 0);
igt_assert_lte(0, h2);
active_count++;
/* Second hang will be pending for this */
pending_count++;
@ -500,7 +500,7 @@ static void test_ban(void)
while (retry--) {
h3 = inject_hang_no_ban_error(fd_bad, 0);
igt_assert(h3 >= 0);
igt_assert_lte(0, h3);
gem_sync(fd_bad, h3);
active_count++;
/* This second hand will count as pending */
@ -515,21 +515,21 @@ static void test_ban(void)
/* Should not happen often but sometimes hang is declared too slow
* due to our way of faking hang using loop */
igt_assert(h4 >= 0);
igt_assert_lte(0, h4);
gem_close(fd_bad, h3);
gem_close(fd_bad, h4);
igt_info("retrying for ban (%d)\n", retry);
}
igt_assert(h4 == -EIO);
igt_assert_eq(h4, -EIO);
assert_reset_status(fd_bad, 0, RS_BATCH_ACTIVE);
gem_sync(fd_good, h7);
assert_reset_status(fd_good, 0, RS_BATCH_PENDING);
igt_assert(gem_reset_stats(fd_good, 0, &rs_good) == 0);
igt_assert(gem_reset_stats(fd_bad, 0, &rs_bad) == 0);
igt_assert_eq(gem_reset_stats(fd_good, 0, &rs_good), 0);
igt_assert_eq(gem_reset_stats(fd_bad, 0, &rs_bad), 0);
igt_assert(rs_bad.batch_active == active_count);
igt_assert(rs_bad.batch_pending == pending_count);
@ -542,14 +542,14 @@ static void test_ban(void)
gem_close(fd_good, h7);
h1 = exec_valid(fd_good, 0);
igt_assert(h1 >= 0);
igt_assert_lte(0, h1);
gem_close(fd_good, h1);
close(fd_bad);
close(fd_good);
igt_assert(gem_reset_status(fd_bad, 0) < 0);
igt_assert(gem_reset_status(fd_good, 0) < 0);
igt_assert_lt(gem_reset_status(fd_bad, 0), 0);
igt_assert_lt(gem_reset_status(fd_good, 0), 0);
}
static void test_ban_ctx(void)
@ -573,15 +573,15 @@ static void test_ban_ctx(void)
assert_reset_status(fd, ctx_bad, RS_NO_ERROR);
h1 = exec_valid(fd, ctx_bad);
igt_assert(h1 >= 0);
igt_assert_lte(0, h1);
h5 = exec_valid(fd, ctx_good);
igt_assert(h5 >= 0);
igt_assert_lte(0, h5);
assert_reset_status(fd, ctx_good, RS_NO_ERROR);
assert_reset_status(fd, ctx_bad, RS_NO_ERROR);
h2 = inject_hang_no_ban_error(fd, ctx_bad);
igt_assert(h2 >= 0);
igt_assert_lte(0, h2);
active_count++;
/* Second hang will be pending for this */
pending_count++;
@ -591,7 +591,7 @@ static void test_ban_ctx(void)
while (retry--) {
h3 = inject_hang_no_ban_error(fd, ctx_bad);
igt_assert(h3 >= 0);
igt_assert_lte(0, h3);
gem_sync(fd, h3);
active_count++;
/* This second hand will count as pending */
@ -606,21 +606,21 @@ static void test_ban_ctx(void)
/* Should not happen often but sometimes hang is declared too slow
* due to our way of faking hang using loop */
igt_assert(h4 >= 0);
igt_assert_lte(0, h4);
gem_close(fd, h3);
gem_close(fd, h4);
igt_info("retrying for ban (%d)\n", retry);
}
igt_assert(h4 == -EIO);
igt_assert_eq(h4, -EIO);
assert_reset_status(fd, ctx_bad, RS_BATCH_ACTIVE);
gem_sync(fd, h7);
assert_reset_status(fd, ctx_good, RS_BATCH_PENDING);
igt_assert(gem_reset_stats(fd, ctx_good, &rs_good) == 0);
igt_assert(gem_reset_stats(fd, ctx_bad, &rs_bad) == 0);
igt_assert_eq(gem_reset_stats(fd, ctx_good, &rs_good), 0);
igt_assert_eq(gem_reset_stats(fd, ctx_bad, &rs_bad), 0);
igt_assert(rs_bad.batch_active == active_count);
igt_assert(rs_bad.batch_pending == pending_count);
@ -633,15 +633,15 @@ static void test_ban_ctx(void)
gem_close(fd, h7);
h1 = exec_valid(fd, ctx_good);
igt_assert(h1 >= 0);
igt_assert_lte(0, h1);
gem_close(fd, h1);
gem_context_destroy(fd, ctx_good);
gem_context_destroy(fd, ctx_bad);
igt_assert(gem_reset_status(fd, ctx_good) < 0);
igt_assert(gem_reset_status(fd, ctx_bad) < 0);
igt_assert(exec_valid(fd, ctx_good) < 0);
igt_assert(exec_valid(fd, ctx_bad) < 0);
igt_assert_lt(gem_reset_status(fd, ctx_good), 0);
igt_assert_lt(gem_reset_status(fd, ctx_bad), 0);
igt_assert_lt(exec_valid(fd, ctx_good), 0);
igt_assert_lt(exec_valid(fd, ctx_bad), 0);
close(fd);
}
@ -663,13 +663,13 @@ static void test_unrelated_ctx(void)
assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
h1 = inject_hang(fd1, ctx_guilty);
igt_assert(h1 >= 0);
igt_assert_lte(0, h1);
gem_sync(fd1, h1);
assert_reset_status(fd1, ctx_guilty, RS_BATCH_ACTIVE);
assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
h2 = exec_valid(fd2, ctx_unrelated);
igt_assert(h2 >= 0);
igt_assert_lte(0, h2);
gem_sync(fd2, h2);
assert_reset_status(fd1, ctx_guilty, RS_BATCH_ACTIVE);
assert_reset_status(fd2, ctx_unrelated, RS_NO_ERROR);
@ -706,7 +706,7 @@ static void test_close_pending_ctx(void)
assert_reset_status(fd, ctx, RS_NO_ERROR);
h = inject_hang(fd, ctx);
igt_assert(h >= 0);
igt_assert_lte(0, h);
gem_context_destroy(fd, ctx);
igt_assert(__gem_context_destroy(fd, ctx) == -ENOENT);
@ -723,7 +723,7 @@ static void test_close_pending(void)
assert_reset_status(fd, 0, RS_NO_ERROR);
h = inject_hang(fd, 0);
igt_assert(h >= 0);
igt_assert_lte(0, h);
gem_close(fd, h);
close(fd);
@ -785,7 +785,7 @@ static void test_close_pending_fork(const bool reverse)
assert_reset_status(fd, 0, RS_NO_ERROR);
h = inject_hang(fd, 0);
igt_assert(h >= 0);
igt_assert_lte(0, h);
sleep(1);
@ -796,7 +796,7 @@ static void test_close_pending_fork(const bool reverse)
pid = fork();
if (pid == 0) {
const int fd2 = drm_open_any();
igt_assert(fd2 >= 0);
igt_assert_lte(0, fd2);
/* The crucial component is that we schedule the same noop batch
* on each ring. This exercises batch_obj reference counting,
@ -807,7 +807,7 @@ static void test_close_pending_fork(const bool reverse)
close(fd2);
return;
} else {
igt_assert(pid > 0);
igt_assert_lt(0, pid);
sleep(1);
/* Kill the child to reduce refcounts on
@ -822,7 +822,7 @@ static void test_close_pending_fork(const bool reverse)
fd = drm_open_any();
h = exec_valid(fd, 0);
igt_assert(h >= 0);
igt_assert_lte(0, h);
gem_sync(fd, h);
gem_close(fd, h);
@ -846,7 +846,7 @@ static void test_reset_count(const bool create_ctx)
igt_assert(c1 >= 0);
h = inject_hang(fd, ctx);
igt_assert (h >= 0);
igt_assert_lte(0, h);
gem_sync(fd, h);
assert_reset_status(fd, ctx, RS_BATCH_ACTIVE);
@ -905,20 +905,20 @@ static void _check_param_ctx(const int fd, const int ctx, const cap_t cap)
if (ctx == 0) {
if (cap == root)
igt_assert(_test_params(fd, ctx, 0, 0) == 0);
igt_assert_eq(_test_params(fd, ctx, 0, 0), 0);
else
igt_assert(_test_params(fd, ctx, 0, 0) == -EPERM);
igt_assert_eq(_test_params(fd, ctx, 0, 0), -EPERM);
}
igt_assert(_test_params(fd, ctx, 0, bad) == -EINVAL);
igt_assert(_test_params(fd, ctx, bad, 0) == -EINVAL);
igt_assert(_test_params(fd, ctx, bad, bad) == -EINVAL);
igt_assert_eq(_test_params(fd, ctx, 0, bad), -EINVAL);
igt_assert_eq(_test_params(fd, ctx, bad, 0), -EINVAL);
igt_assert_eq(_test_params(fd, ctx, bad, bad), -EINVAL);
}
static void check_params(const int fd, const int ctx, cap_t cap)
{
igt_assert(ioctl(fd, GET_RESET_STATS_IOCTL, 0) == -1);
igt_assert(_test_params(fd, 0xbadbad, 0, 0) == -ENOENT);
igt_assert_eq(_test_params(fd, 0xbadbad, 0, 0), -ENOENT);
_check_param_ctx(fd, ctx, cap);
}
@ -982,14 +982,14 @@ static void defer_hangcheck(int ring_num)
igt_skip_on(next_ring == current_ring);
count_start = get_reset_count(fd, 0);
igt_assert(count_start >= 0);
igt_assert_lte(0, count_start);
igt_assert(inject_hang_ring(fd, 0, current_ring->exec, true));
while (--seconds) {
igt_assert(exec_valid_ring(fd, 0, next_ring->exec));
count_end = get_reset_count(fd, 0);
igt_assert(count_end >= 0);
igt_assert_lte(0, count_end);
if (count_end > count_start)
break;
@ -997,7 +997,7 @@ static void defer_hangcheck(int ring_num)
sleep(1);
}
igt_assert(count_end > count_start);
igt_assert_lt(count_start, count_end);
close(fd);
}

2
tests/gem_ringfill.c
View File

@ -156,7 +156,7 @@ static int check_ring(drm_intel_bufmgr *bufmgr,
igt_progress(output, i, width*height);
igt_assert(y < height);
igt_assert_lt(y, height);
/* Dummy load to fill the ring */
copy(batch, NULL, &src, 0, 0, width, height, &tmp, 0, 0);

18
tests/gem_seqno_wrap.c
View File

@ -321,7 +321,7 @@ static int read_seqno(void)
int wrap = 0;
r = __read_seqno(&seqno);
igt_assert(r == 0);
igt_assert_eq(r, 0);
if (last_seqno > seqno)
wrap++;
@ -387,16 +387,16 @@ static void run_test(void)
static void preset_run_once(void)
{
igt_assert(write_seqno(1) == 0);
igt_assert_eq(write_seqno(1), 0);
run_test();
igt_assert(write_seqno(0x7fffffff) == 0);
igt_assert_eq(write_seqno(0x7fffffff), 0);
run_test();
igt_assert(write_seqno(0xffffffff) == 0);
igt_assert_eq(write_seqno(0xffffffff), 0);
run_test();
igt_assert(write_seqno(0xfffffff0) == 0);
igt_assert_eq(write_seqno(0xfffffff0), 0);
run_test();
}
@ -410,7 +410,7 @@ static void random_run_once(void)
val += random();
} while (val == 0);
igt_assert(write_seqno(val) == 0);
igt_assert_eq(write_seqno(val), 0);
run_test();
}
@ -418,7 +418,7 @@ static void wrap_run_once(void)
{
const uint32_t pw_val = calc_prewrap_val();
igt_assert(write_seqno(UINT32_MAX - pw_val) == 0);
igt_assert_eq(write_seqno(UINT32_MAX - pw_val), 0);
while(!read_seqno())
run_test();
@ -428,7 +428,7 @@ static void background_run_once(void)
{
const uint32_t pw_val = calc_prewrap_val();
igt_assert(write_seqno(UINT32_MAX - pw_val) == 0);
igt_assert_eq(write_seqno(UINT32_MAX - pw_val), 0);
while(!read_seqno())
sleep(3);
@ -525,7 +525,7 @@ int main(int argc, char **argv)
options.dontwrap ? "tests" : "wraps", wcount);
}
igt_assert(options.rounds == wcount);
igt_assert_eq(options.rounds, wcount);
igt_exit();
}

6
tests/gem_set_tiling_vs_blt.c
View File

@ -121,7 +121,7 @@ static void do_test(uint32_t tiling, unsigned stride,
test_bo = drm_intel_bo_alloc(bufmgr, "tiled busy bo", TEST_SIZE, 4096);
test_bo_handle = test_bo->handle;
ret = drm_intel_bo_set_tiling(test_bo, &tiling_after, stride_after);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
drm_intel_gem_bo_map_gtt(test_bo);
ptr = test_bo->virtual;
*ptr = 0;
@ -141,7 +141,7 @@ static void do_test(uint32_t tiling, unsigned stride,
test_bo_handle = test_bo->handle;
/* ensure we have the right tiling before we start. */
ret = drm_intel_bo_set_tiling(test_bo, &tiling, stride);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
if (tiling == I915_TILING_NONE) {
drm_intel_bo_subdata(test_bo, 0, TEST_SIZE, data);
@ -179,7 +179,7 @@ static void do_test(uint32_t tiling, unsigned stride,
/* double check that the reuse trick worked */
igt_assert(test_bo_handle == test_bo->handle);
ret = drm_intel_bo_set_tiling(test_bo, &tiling_after, stride_after);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/* Note: We don't care about gen4+ here because the blitter doesn't use
* fences there. So not setting tiling flags on the tiled buffer is ok.

2
tests/gem_storedw_batches_loop.c
View File

@ -84,7 +84,7 @@ store_dword_loop(int divider, unsigned flags)
cmd_address_offset = j * 4;
buf[j++] = target_bo->offset;
}
igt_assert(j > 0);
igt_assert_lt(0, j);
buf[j++] = 0x42000000 + val;
igt_assert(drm_intel_bo_references(cmd_bo, target_bo) == 0);

4
tests/gem_stress.c
View File

@ -193,7 +193,7 @@ static void keep_gpu_busy(void)
int tmp;
tmp = 1 << gpu_busy_load;
igt_assert(tmp <= 1024);
igt_assert_lte(tmp, 1024);
emit_blt(busy_bo, 0, 4096, 0, 0, tmp, 128,
busy_bo, 0, 4096, 0, 128);
@ -749,7 +749,7 @@ static void init(void)
drm_intel_bufmgr_gem_enable_reuse(bufmgr);
drm_intel_bufmgr_gem_enable_fenced_relocs(bufmgr);
num_fences = gem_available_fences(drm_fd);
igt_assert(num_fences > 4);
igt_assert_lt(4, num_fences);
batch = intel_batchbuffer_alloc(bufmgr, devid);
busy_bo = drm_intel_bo_alloc(bufmgr, "tiled bo", BUSY_BUF_SIZE, 4096);

2
tests/gem_threaded_access_tiled.c
View File

@ -77,7 +77,7 @@ static int copy_tile_threaded(drm_intel_bo *bo)
for (i = 0; i < NUM_THREADS; i++) {
tctx[i].bo = bo;
r = pthread_create(&thr[i], NULL, copy_fn, (void *)&tctx[i]);
igt_assert(r == 0);
igt_assert_eq(r, 0);
}
for (i = 0; i < NUM_THREADS; i++) {

2
tests/gem_tiled_fence_blits.c
View File

@ -74,7 +74,7 @@ create_bo(int fd, uint32_t start_val)
bo = drm_intel_bo_alloc(bufmgr, "tiled bo", 1024 * 1024, 4096);
ret = drm_intel_bo_set_tiling(bo, &tiling, width * 4);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(tiling == I915_TILING_X);
/* Fill the BO with dwords starting at start_val */

67
tests/gem_userptr_blits.c
View File

@ -201,7 +201,7 @@ copy(int fd, uint32_t dst, uint32_t src, unsigned int error)
ret = errno;
if (error == ~0)
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
else
igt_assert(ret == error);
@ -295,7 +295,7 @@ create_userptr(int fd, uint32_t val, uint32_t *ptr)
int i, ret;
ret = gem_userptr(fd, ptr, sizeof(linear), 0, &handle);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(handle != 0);
/* Fill the BO with dwords starting at val */
@ -375,7 +375,7 @@ static uint32_t create_userptr_bo(int fd, int size)
igt_assert(ptr != MAP_FAILED);
ret = gem_userptr(fd, (uint32_t *)ptr, size, 0, &handle);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
add_handle_ptr(handle, ptr, size);
return handle;
@ -477,7 +477,7 @@ static int test_input_checking(int fd)
userptr.user_size = 0;
userptr.flags = ~0;
ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
/* Too big. */
memset(&userptr, 0, sizeof(userptr));
@ -485,7 +485,7 @@ static int test_input_checking(int fd)
userptr.user_size = ~0;
userptr.flags = 0;
ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
/* Both wrong. */
memset(&userptr, 0, sizeof(userptr));
@ -493,7 +493,7 @@ static int test_input_checking(int fd)
userptr.user_size = ~0;
userptr.flags = ~0;
ret = drmIoctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
return 0;
}
@ -531,7 +531,7 @@ static int test_invalid_null_pointer(int fd)
/* NULL pointer. */
ret = gem_userptr(fd, NULL, PAGE_SIZE, 0, &handle);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
copy(fd, handle, handle, ~0); /* QQQ Precise errno? */
gem_close(fd, handle);
@ -554,7 +554,7 @@ static int test_invalid_gtt_mapping(int fd)
igt_assert((sizeof(linear) & (PAGE_SIZE - 1)) == 0);
ret = gem_userptr(fd, ptr, sizeof(linear), 0, &handle2);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
copy(fd, handle2, handle2, ~0); /* QQQ Precise errno? */
gem_close(fd, handle2);
@ -598,7 +598,7 @@ static void test_forked_access(int fd)
ret |= madvise(ptr1, sizeof(linear), MADV_DONTFORK);
#endif
ret |= gem_userptr(fd, ptr1, sizeof(linear), 0, &handle1);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(ptr1);
igt_assert(handle1);
@ -607,7 +607,7 @@ static void test_forked_access(int fd)
ret |= madvise(ptr2, sizeof(linear), MADV_DONTFORK);
#endif
ret |= gem_userptr(fd, ptr2, sizeof(linear), 0, &handle2);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(ptr2);
igt_assert(handle2);
@ -629,13 +629,13 @@ static void test_forked_access(int fd)
#ifdef MADV_DOFORK
ret = madvise(ptr1, sizeof(linear), MADV_DOFORK);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
#endif
free(ptr1);
#ifdef MADV_DOFORK
ret = madvise(ptr2, sizeof(linear), MADV_DOFORK);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
#endif
free(ptr2);
}
@ -655,7 +655,7 @@ static int test_forbidden_ops(int fd)
igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0);
ret = gem_userptr(fd, ptr, PAGE_SIZE, 0, &handle);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/* pread/pwrite are not always forbidden, but when they
* are they should fail with EINVAL.
@ -791,8 +791,8 @@ static int test_dmabuf(void)
close(fd1);
return 0;
} else {
igt_assert(ret == 0);
igt_assert(dma_buf_fd >= 0);
igt_assert_eq(ret, 0);
igt_assert_lte(0, dma_buf_fd);
}
fd2 = drm_open_any();
@ -814,7 +814,7 @@ static int test_dmabuf(void)
sigact.sa_sigaction = sigbus;
sigact.sa_flags = SA_SIGINFO;
ret = sigaction(SIGBUS, &sigact, &orig_sigact);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
orig_sigbus = orig_sigact.sa_sigaction;
@ -823,7 +823,7 @@ static int test_dmabuf(void)
igt_assert(sigbus_cnt > 0);
ret = sigaction(SIGBUS, &orig_sigact, NULL);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
close(fd2);
@ -842,19 +842,19 @@ static int test_usage_restrictions(int fd)
/* Address not aligned. */
ret = gem_userptr(fd, (char *)ptr + 1, PAGE_SIZE, 0, &handle);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
/* Size not rounded to page size. */
ret = gem_userptr(fd, ptr, PAGE_SIZE - 1, 0, &handle);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
/* Both wrong. */
ret = gem_userptr(fd, (char *)ptr + 1, PAGE_SIZE - 1, 0, &handle);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
/* Read-only not supported. */
ret = gem_userptr(fd, (char *)ptr, PAGE_SIZE, 1, &handle);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
free(ptr);
@ -1062,19 +1062,19 @@ static void test_overlap(int fd, int expected)
igt_assert(posix_memalign((void *)&ptr, PAGE_SIZE, PAGE_SIZE * 3) == 0);
ret = gem_userptr(fd, ptr + PAGE_SIZE, PAGE_SIZE, 0, &handle);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/* before, no overlap */
ret = gem_userptr(fd, ptr, PAGE_SIZE, 0, &handle2);
if (ret == 0)
gem_close(fd, handle2);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/* after, no overlap */
ret = gem_userptr(fd, ptr + PAGE_SIZE * 2, PAGE_SIZE, 0, &handle2);
if (ret == 0)
gem_close(fd, handle2);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/* exactly overlapping */
ret = gem_userptr(fd, ptr + PAGE_SIZE, PAGE_SIZE, 0, &handle2);
@ -1121,7 +1121,7 @@ static void test_unmap(int fd, int expected)
for (i = 0; i < num_obj; i++, bo_ptr += sizeof(linear)) {
ret = gem_userptr(fd, bo_ptr, sizeof(linear), 0, &bo[i]);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
bo[num_obj] = create_bo(fd, 0);
@ -1130,7 +1130,7 @@ static void test_unmap(int fd, int expected)
copy(fd, bo[num_obj], bo[i], 0);
ret = munmap(ptr, map_size);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
for (i = 0; i < num_obj; i++)
copy(fd, bo[num_obj], bo[i], expected);
@ -1156,7 +1156,7 @@ static void test_unmap_after_close(int fd)
for (i = 0; i < num_obj; i++, bo_ptr += sizeof(linear)) {
ret = gem_userptr(fd, bo_ptr, sizeof(linear), 0, &bo[i]);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
bo[num_obj] = create_bo(fd, 0);
@ -1168,7 +1168,7 @@ static void test_unmap_after_close(int fd)
gem_close(fd, bo[i]);
ret = munmap(ptr, map_size);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
static void test_unmap_cycles(int fd, int expected)
@ -1223,11 +1223,11 @@ static void test_stress_mm(int fd)
igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0);
ret = pthread_create(&t, NULL, mm_stress_thread, &stdata);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
while (loops--) {
ret = gem_userptr(fd, ptr, PAGE_SIZE, 0, &handle);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
gem_close(fd, handle);
}
@ -1236,9 +1236,9 @@ static void test_stress_mm(int fd)
stdata.stop = 1;
ret = pthread_join(t, NULL);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_assert(stdata.exit_code == 0);
igt_assert_eq(stdata.exit_code, 0);
}
struct userptr_close_thread_data {
@ -1261,7 +1261,8 @@ static void *mm_userptr_close_thread(void *data)
while (!t->stop) {
pthread_mutex_unlock(&t->mutex);
for (int i = 0; i < num_handles; i++)
igt_assert(gem_userptr(t->fd, t->ptr, PAGE_SIZE, 0, &handle[i]) == 0);
igt_assert_eq(gem_userptr(t->fd, t->ptr, PAGE_SIZE, 0, &handle[i]),
0);
for (int i = 0; i < num_handles; i++)
gem_close(t->fd, handle[i]);
pthread_mutex_lock(&t->mutex);

4
tests/gem_workarounds.c
View File

@ -157,7 +157,7 @@ static int workaround_fail_count(void)
static void check_workarounds(enum operation op)
{
igt_assert(workaround_fail_count() == 0);
igt_assert_eq(workaround_fail_count(), 0);
switch (op) {
case GPU_RESET:
@ -175,7 +175,7 @@ static void check_workarounds(enum operation op)
igt_assert(0);
}
igt_assert(workaround_fail_count() == 0);
igt_assert_eq(workaround_fail_count(), 0);
}
igt_main

4
tests/gen3_mixed_blits.c
View File

@ -319,7 +319,7 @@ render_copy(int fd,
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
gem_close(fd, handle);
}
@ -397,7 +397,7 @@ static void blt_copy(int fd, uint32_t dst, uint32_t src)
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
gem_close(fd, handle);
}

2
tests/gen3_render_linear_blits.c
View File

@ -289,7 +289,7 @@ copy(int fd, uint32_t dst, uint32_t src)
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
gem_close(fd, handle);
}

2
tests/gen3_render_mixed_blits.c
View File

@ -302,7 +302,7 @@ copy(int fd,
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
gem_close(fd, handle);
}

2
tests/gen3_render_tiledx_blits.c
View File

@ -289,7 +289,7 @@ copy(int fd, uint32_t dst, uint32_t src)
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
gem_close(fd, handle);
}

2
tests/gen3_render_tiledy_blits.c
View File

@ -289,7 +289,7 @@ copy(int fd, uint32_t dst, uint32_t src)
drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
}
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
gem_close(fd, handle);
}

4
tests/gen7_forcewake_mt.c
View File

@ -94,14 +94,14 @@ static void *igfx_get_mmio(void)
igt_skip_on(intel_gen(pci->device_id) != 7);
error = pci_device_probe(pci);
igt_assert(error == 0);
igt_assert_eq(error, 0);
error = pci_device_map_range(pci,
pci->regions[0].base_addr,
2*1024*1024,
PCI_DEV_MAP_FLAG_WRITABLE,
&mmio);
igt_assert(error == 0);
igt_assert_eq(error, 0);
igt_assert(mmio != NULL);
return mmio;

6
tests/kms_cursor_crc.c
View File

@ -159,7 +159,7 @@ static void do_fail_test(data_t *data, int x, int y, int expect)
cursor_disable(data);
igt_display_commit(display);
igt_assert(ret == expect);
igt_assert_eq(ret, expect);
}
static void do_test(data_t *data,
@ -429,12 +429,12 @@ static void test_cursor_size(data_t *data)
/* Hardware test loop */
cursor_enable(data);
ret = drmModeMoveCursor(data->drm_fd, data->output->config.crtc->crtc_id, 0, 0);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
for (i = 0, size = cursor_max_size; size >= 64; size /= 2, i++) {
/* Change size in flight: */
ret = drmModeSetCursor(data->drm_fd, data->output->config.crtc->crtc_id,
data->fb.gem_handle, size, size);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_wait_for_vblank(data->drm_fd, data->pipe);
igt_pipe_crc_collect_crc(pipe_crc, &crc[i]);
}

8
tests/kms_flip.c
View File

@ -771,7 +771,7 @@ static void eat_error_state(void)
int fd;
fd = igt_debugfs_open(dfs_entry_error, O_WRONLY);
igt_assert(fd >= 0);
igt_assert_lte(0, fd);
igt_assert(write(fd, data, sizeof(data)) == sizeof(data));
close(fd);
@ -1348,7 +1348,7 @@ static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
if (!o->mode_valid)
return;
igt_assert(o->count == crtc_count);
igt_assert_eq(o->count, crtc_count);
last_connector = o->kconnector[0];
@ -1407,10 +1407,10 @@ static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
sleep(1);
if (o->flags & TEST_BO_TOOBIG) {
igt_assert(do_page_flip(o, o->fb_ids[1], true) == -E2BIG);
igt_assert_eq(do_page_flip(o, o->fb_ids[1], true), -E2BIG);
goto out;
} else
igt_assert(do_page_flip(o, o->fb_ids[1], true) == 0);
igt_assert_eq(do_page_flip(o, o->fb_ids[1], true), 0);
wait_for_events(o);
o->current_fb_id = 1;

10
tests/kms_flip_event_leak.c
View File

@ -76,10 +76,10 @@ static bool test(data_t *data, enum pipe pipe, igt_output_t *output)
fd = drm_open_any();
ret = drmDropMaster(data->drm_fd);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
ret = drmSetMaster(fd);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_create_color_fb(fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
@ -88,13 +88,13 @@ static bool test(data_t *data, enum pipe pipe, igt_output_t *output)
ret = drmModePageFlip(fd, output->config.crtc->crtc_id,
fb[1].fb_id, DRM_MODE_PAGE_FLIP_EVENT,
data);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
ret = close(fd);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
ret = drmSetMaster(data->drm_fd);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_plane_set_fb(primary, NULL);
igt_output_set_pipe(output, PIPE_ANY);

2
tests/kms_flip_tiling.c
View File

@ -104,7 +104,7 @@ test_flip_changes_tiling(data_t *data, igt_output_t *output)
/* flip to the linear buffer */
ret = drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id,
fb_id, 0, NULL);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_wait_for_vblank(data->drm_fd, pipe);

20
tests/kms_mmio_vs_cs_flip.c
View File

@ -127,7 +127,7 @@ static void wait_for_flip(data_t *data, uint32_t flip_handle)
if (ret < 0 && errno == EINTR)
continue;
igt_assert(ret >= 0);
igt_assert_lte(0, ret);
do_or_die(drmHandleEvent(data->drm_fd, &evctx));
}
@ -256,14 +256,14 @@ test_plane(data_t *data, igt_output_t *output, enum pipe pipe, enum igt_plane pl
ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id,
blue_fb.fb_id, 0, 0, &output->id, 1,
mode);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
make_gpu_busy(data, blue_fb.gem_handle);
data->flip_done = false;
ret = drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id,
blue_fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, data);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/*
* Toggle a fullscreen sprite on and back off. This will result
@ -279,14 +279,14 @@ test_plane(data_t *data, igt_output_t *output, enum pipe pipe, enum igt_plane pl
green_fb.fb_id, 0,
0, 0, mode->hdisplay, mode->vdisplay,
0, 0, mode->hdisplay << 16, mode->vdisplay << 16);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
ret = drmModeSetPlane(data->drm_fd,
sprite->drm_plane->plane_id,
output->config.crtc->crtc_id,
0, 0,
0, 0, 0, 0,
0, 0, 0, 0);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/*
* Set primary plane to red fb. This should wait for the CS flip
@ -298,7 +298,7 @@ test_plane(data_t *data, igt_output_t *output, enum pipe pipe, enum igt_plane pl
ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id,
red_fb.fb_id, 0, 0, &output->id, 1,
mode);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/* Make sure the flip has been executed */
wait_for_flip(data, blue_fb.gem_handle);
@ -410,7 +410,7 @@ test_crtc(data_t *data, igt_output_t *output, enum pipe pipe)
ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id,
green_fb.fb_id, 0, 1, &output->id, 1,
mode);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/*
* Make it more likely that the CS flip has been submitted into the
@ -424,7 +424,7 @@ test_crtc(data_t *data, igt_output_t *output, enum pipe pipe)
ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id,
green_fb.fb_id, 0, 0, &output->id, 1,
mode);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
make_gpu_busy(data, blue_fb.gem_handle);
@ -435,7 +435,7 @@ test_crtc(data_t *data, igt_output_t *output, enum pipe pipe)
data->flip_done = false;
ret = drmModePageFlip(data->drm_fd, output->config.crtc->crtc_id,
blue_fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, data);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/*
* Set primary plane to red fb. This should wait for the CS flip
@ -447,7 +447,7 @@ test_crtc(data_t *data, igt_output_t *output, enum pipe pipe)
ret = drmModeSetCrtc(data->drm_fd, output->config.crtc->crtc_id,
red_fb.fb_id, 0, 0, &output->id, 1,
mode);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
/* Make sure the flip has been executed */
wait_for_flip(data, blue_fb.gem_handle);

20
tests/kms_psr_sink_crc.c
View File

@ -188,11 +188,11 @@ static bool psr_enabled(data_t *data)
igt_require(file);
ret = fscanf(file, "Sink_Support: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
ret = fscanf(file, "Source_OK: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
ret = fscanf(file, "Enabled: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
fclose(file);
return strcmp(str, "yes") == 0;
@ -211,19 +211,19 @@ static bool psr_active(data_t *data)
igt_require(file);
ret = fscanf(file, "Sink_Support: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
ret = fscanf(file, "Source_OK: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
ret = fscanf(file, "Enabled: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
ret = fscanf(file, "Active: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
ret = fscanf(file, "Busy frontbuffer bits: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
ret = fscanf(file, "Re-enable work scheduled: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
ret = fscanf(file, "HW Enabled & Active bit: %s\n", str);
igt_assert(ret != 0);
igt_assert_neq(ret, 0);
fclose(file);
return strcmp(str, "yes") == 0;

4
tests/kms_render.c
View File

@ -112,12 +112,12 @@ static int test_format(const char *test_name,
ret = asprintf(&mode_format_str, "%s @ %dHz / %s",
mode->name, mode->vrefresh, igt_format_str(format));
igt_assert(ret > 0);
igt_assert_lt(0, ret);
ret = asprintf(&cconf_str, "pipe %s, encoder %s, connector %s",
kmstest_pipe_name(cconf->pipe),
kmstest_encoder_type_str(cconf->encoder->encoder_type),
kmstest_connector_type_str(cconf->connector->connector_type));
igt_assert(ret > 0);
igt_assert_lt(0, ret);
igt_info("Beginning test %s with %s on %s\n",
test_name, mode_format_str, cconf_str);

4
tests/kms_setmode.c
View File

@ -187,7 +187,7 @@ static void create_fb_for_crtc(struct crtc_config *crtc,
crtc->mode.vdisplay,
igt_bpp_depth_to_drm_format(bpp, depth),
I915_TILING_NONE, fb_info);
igt_assert(fb_id > 0);
igt_assert_lt(0, fb_id);
}
static void get_mode_for_crtc(struct crtc_config *crtc,
@ -281,7 +281,7 @@ static void setup_crtcs(drmModeRes *resources, struct connector_config *cconf,
unsigned long encoder_mask;
int j;
igt_assert(crtc_count < MAX_CRTCS);
igt_assert_lt(crtc_count, MAX_CRTCS);
crtc->crtc_idx = cconf[i].crtc_idx;
drm_crtc = drmModeGetCrtc(drm_fd,

6
tests/kms_universal_plane.c
View File

@ -148,8 +148,8 @@ functional_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
else if (display->pipes[pipe].planes[i].is_cursor)
num_cursor++;
igt_assert(num_primary == 1);
igt_assert(num_cursor <= 1);
igt_assert_eq(num_primary, 1);
igt_assert_lte(num_cursor, 1);
primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY);
sprite = igt_output_get_plane(output, IGT_PLANE_2);
@ -513,7 +513,7 @@ pageflip_test_pipe(data_t *data, enum pipe pipe, igt_output_t *output)
do {
ret = select(data->drm_fd + 1, &fds, NULL, NULL, &timeout);
} while (ret < 0 && errno == EINTR);
igt_assert(ret == 1);
igt_assert_eq(ret, 1);
igt_assert(drmHandleEvent(data->drm_fd, &evctx) == 0);
igt_plane_set_fb(primary, NULL);

4
tests/pm_lpsp.c
View File

@ -162,7 +162,7 @@ static void edp_subtest(int drm_fd, drmModeResPtr drm_res,
rc = drmModeSetCrtc(drm_fd, crtc_id, buffer_id, 0, 0, &connector_id, 1,
mode);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
if (use_panel_fitter) {
if (IS_HASWELL(devid))
@ -209,7 +209,7 @@ static void non_edp_subtest(int drm_fd, drmModeResPtr drm_res,
rc = drmModeSetCrtc(drm_fd, crtc_id, buffer_id, 0, 0, &connector_id, 1,
mode);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(!lpsp_is_enabled(drm_fd));
}

6
tests/pm_rc6_residency.c
View File

@ -48,7 +48,7 @@ static unsigned int readit(const char *path)
file = fopen(path, "r");
igt_assert(file);
scanned = fscanf(file, "%u", &ret);
igt_assert(scanned == 1);
igt_assert_eq(scanned, 1);
fclose(file);
@ -68,7 +68,7 @@ static void read_rc6_residency( int value[], const char *name_of_rc6_residency)
sleep(5);
ret = asprintf(&path, "/sys/class/drm/card%d/power/rc6_enable", device);
igt_assert(ret != -1);
igt_assert_neq(ret, -1);
file = fopen(path, "r");
igt_require(file);
@ -81,7 +81,7 @@ static void read_rc6_residency( int value[], const char *name_of_rc6_residency)
{
sleep(SLEEP_DURATION / 1000);
ret = asprintf(&path, "/sys/class/drm/card%d/power/%s_residency_ms",device,name_of_rc6_residency);
igt_assert(ret != -1);
igt_assert_neq(ret, -1);
value[i] = readit(path);
}
free(path);

56
tests/pm_rpm.c
View File

@ -624,7 +624,7 @@ static int count_i2c_valid_edids(void)
if (strncmp(dirent->d_name, "i2c-", 4) == 0) {
snprintf(full_name, 32, "/dev/%s", dirent->d_name);
fd = open(full_name, O_RDWR);
igt_assert(fd != -1);
igt_assert_neq(fd, -1);
if (i2c_edid_is_valid(fd))
ret++;
close(fd);
@ -883,7 +883,7 @@ static void read_full_file(const char *name)
} while (rc == ARRAY_SIZE(buf));
rc = close(fd);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert_f(wait_for_suspended(), "File: %s\n", name);
}
@ -900,7 +900,7 @@ static void read_files_from_dir(const char *name, int level)
full_name = malloc(PATH_MAX);
igt_assert(level < 128);
igt_assert_lt(level, 128);
while ((dirent = readdir(dir))) {
struct stat stat_buf;
@ -913,7 +913,7 @@ static void read_files_from_dir(const char *name, int level)
snprintf(full_name, PATH_MAX, "%s/%s", name, dirent->d_name);
rc = lstat(full_name, &stat_buf);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
if (S_ISDIR(stat_buf.st_mode))
read_files_from_dir(full_name, level + 1);
@ -979,7 +979,7 @@ static void debugfs_forcewake_user_subtest(void)
}
rc = close(fd);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
}
@ -1233,7 +1233,7 @@ static void gem_execbuf_subtest(void)
if (y >= sq_y && y < (sq_y + sq_h) &&
x >= sq_x && x < (sq_x + sq_w))
igt_assert(px == color);
igt_assert_eq_u32(px, color);
else
igt_assert(px == 0);
}
@ -1250,7 +1250,7 @@ static void gem_execbuf_subtest(void)
if (y >= sq_y && y < (sq_y + sq_h) &&
x >= sq_x && x < (sq_x + sq_w))
igt_assert(px == color);
igt_assert_eq_u32(px, color);
else
igt_assert(px == 0);
}
@ -1273,7 +1273,7 @@ static void gem_execbuf_subtest(void)
if (y >= sq_y && y < (sq_y + sq_h) &&
x >= sq_x && x < (sq_x + sq_w))
igt_assert(px == color);
igt_assert_eq_u32(px, color);
else
igt_assert(px == 0);
}
@ -1388,7 +1388,7 @@ static bool device_in_pci_d3(void)
pci_dev = intel_get_pci_device();
rc = pci_device_cfg_read_u16(pci_dev, &val, 0xd4);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
return (val & 0x3) == 0x3;
}
@ -1523,54 +1523,54 @@ static void cursor_subtest(bool dpms)
rc = drmModeSetCursor(drm_fd, crtc_id, cursor_fb1.gem_handle,
cursor_fb1.width, cursor_fb1.height);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
rc = drmModeMoveCursor(drm_fd, crtc_id, 0, 0);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_active());
disable_or_dpms_all_screens_and_wait(&ms_data, dpms);
/* First, just move the cursor. */
rc = drmModeMoveCursor(drm_fd, crtc_id, 1, 1);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
/* Then unset it, and set a new one. */
rc = drmModeSetCursor(drm_fd, crtc_id, 0, 0, 0);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
rc = drmModeSetCursor(drm_fd, crtc_id, cursor_fb2.gem_handle,
cursor_fb1.width, cursor_fb2.height);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
/* Move the new cursor. */
rc = drmModeMoveCursor(drm_fd, crtc_id, 2, 2);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
/* Now set a new one without unsetting the previous one. */
rc = drmModeSetCursor(drm_fd, crtc_id, cursor_fb1.gem_handle,
cursor_fb1.width, cursor_fb1.height);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
/* Cursor 3 was created with tiling and painted with a GTT mmap, so
* hopefully it has some fences around it. */
rc = drmModeRmFB(drm_fd, cursor_fb3.fb_id);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
gem_set_tiling(drm_fd, cursor_fb3.gem_handle, false, cursor_fb3.stride);
igt_assert(wait_for_suspended());
rc = drmModeSetCursor(drm_fd, crtc_id, cursor_fb3.gem_handle,
cursor_fb3.width, cursor_fb3.height);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
/* Make sure nothing remains for the other tests. */
rc = drmModeSetCursor(drm_fd, crtc_id, 0, 0, 0);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
}
@ -1664,7 +1664,7 @@ static void test_one_plane(bool dpms, uint32_t plane_id,
0, 0, plane_fb1.width, plane_fb1.height,
0 << 16, 0 << 16, plane_fb1.width << 16,
plane_fb1.height << 16);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
disable_or_dpms_all_screens_and_wait(&ms_data, dpms);
@ -1677,19 +1677,19 @@ static void test_one_plane(bool dpms, uint32_t plane_id,
crtc_x, crtc_y, plane_fb1.width, plane_fb1.height,
0 << 16, 0 << 16, plane_fb1.width << 16,
plane_fb1.height << 16);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
/* Unset, then change the plane. */
rc = drmModeSetPlane(drm_fd, plane_id, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
rc = drmModeSetPlane(drm_fd, plane_id, crtc_id, plane_fb2.fb_id, 0,
crtc_x, crtc_y, plane_fb2.width, plane_fb2.height,
0 << 16, 0 << 16, plane_fb2.width << 16,
plane_fb2.height << 16);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
/* Now change the plane without unsetting first. */
@ -1697,12 +1697,12 @@ static void test_one_plane(bool dpms, uint32_t plane_id,
crtc_x, crtc_y, plane_fb1.width, plane_fb1.height,
0 << 16, 0 << 16, plane_fb1.width << 16,
plane_fb1.height << 16);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
/* Make sure nothing remains for the other tests. */
rc = drmModeSetPlane(drm_fd, plane_id, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(wait_for_suspended());
}
@ -1741,11 +1741,11 @@ static void planes_subtest(bool universal, bool dpms)
if (universal) {
rc = drmSetClientCap(drm_fd, DRM_CLIENT_CAP_UNIVERSAL_PLANES, 0);
igt_assert(rc == 0);
igt_assert_eq(rc, 0);
igt_assert(planes_tested >= 3);
igt_assert_lte(3, planes_tested);
} else {
igt_assert(planes_tested >= 1);
igt_assert_lte(1, planes_tested);
}
}

4
tests/pm_rps.c
View File

@ -75,7 +75,7 @@ static int readval(FILE *filp)
rewind(filp);
scanned = fscanf(filp, "%d", &val);
igt_assert(scanned == 1);
igt_assert_eq(scanned, 1);
return val;
}
@ -571,7 +571,7 @@ static void blocking(void)
int post_freqs[NUMFREQ];
int fd = drm_open_any();
igt_assert(fd >= 0);
igt_assert_lte(0, fd);
/*
* quiescent_gpu upsets the gpu and makes it get pegged to max somehow.

8
tests/prime_nv_api.c
View File

@ -107,7 +107,7 @@ static void test_i915_nv_import_twice_check_flink_name(void)
igt_assert(nouveau_bo_name_get(nvbo, &flink_name1) == 0);
igt_assert(nouveau_bo_name_get(nvbo2, &flink_name2) == 0);
igt_assert(flink_name1 == flink_name2);
igt_assert_eq_u32(flink_name1, flink_name2);
nouveau_bo_ref(NULL, &nvbo2);
nouveau_bo_ref(NULL, &nvbo);
@ -137,7 +137,7 @@ static void test_i915_nv_reimport_twice_check_flink_name(void)
igt_assert(nouveau_bo_name_get(nvbo, &flink_name1) == 0);
igt_assert(nouveau_bo_name_get(nvbo2, &flink_name2) == 0);
igt_assert(flink_name1 == flink_name2);
igt_assert_eq_u32(flink_name1, flink_name2);
nouveau_bo_ref(NULL, &nvbo2);
nouveau_bo_ref(NULL, &nvbo);
@ -166,7 +166,7 @@ static void test_nv_i915_import_twice_check_flink_name(void)
igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0);
igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0);
igt_assert(flink_name1 == flink_name2);
igt_assert_eq_u32(flink_name1, flink_name2);
nouveau_bo_ref(NULL, &nvbo);
drm_intel_bo_unreference(intel_bo);
@ -197,7 +197,7 @@ static void test_nv_i915_reimport_twice_check_flink_name(void)
igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0);
igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0);
igt_assert(flink_name1 == flink_name2);
igt_assert_eq_u32(flink_name1, flink_name2);
nouveau_bo_ref(NULL, &nvbo);
drm_intel_bo_unreference(intel_bo);

8
tests/prime_nv_pcopy.c
View File

@ -411,7 +411,7 @@ static void perform_copy(struct nouveau_bo *nvbo, const rect *dst,
ret = nouveau_pushbuf_kick(push, push->channel);
while (!ret && *query < query_counter) { usleep(1000); }
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
}
static void check1_macro(uint32_t *p, uint32_t w, uint32_t h)
@ -561,7 +561,7 @@ static void test1_micro(void)
igt_assert(drm_intel_gem_bo_map_gtt(test_intel_bo) == 0);
drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
igt_assert(prime_fd >= 0);
igt_assert_lte(0, prime_fd);
noop_intel(test_intel_bo);
nv_bo_alloc(&bo_intel, &intel, w, h, tile_intel_y, prime_fd, 0);
@ -695,7 +695,7 @@ static void test3_base(int tile_src, int tile_dst)
igt_assert(test_intel_bo);
drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
igt_assert(prime_fd >= 0);
igt_assert_lte(0, prime_fd);
nv_bo_alloc(&bo_intel, &intel, 2048 * cpp, 768, tile_dst, prime_fd, 0);
nv_bo_alloc(&bo_nvidia, &nvidia, 300 * cpp, 300, tile_src, -1, NOUVEAU_BO_VRAM);
@ -783,7 +783,7 @@ static void test_semaphore(void)
igt_assert(test_intel_bo);
drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
igt_assert(prime_fd >= 0);
igt_assert_lte(0, prime_fd);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &sema_bo) == 0);
close(prime_fd);

12
tests/prime_self_import.c
View File

@ -162,7 +162,7 @@ static void test_with_one_bo_two_files(void)
handle_import = prime_fd_to_handle(fd2, dma_buf_fd2);
/* dma-buf selfimporting an flink bo should give the same handle */
igt_assert(handle_import == handle_open);
igt_assert_eq_u32(handle_import, handle_open);
close(fd1);
close(fd2);
@ -189,11 +189,11 @@ static void test_with_one_bo(void)
/* reimport should give us the same handle so that userspace can check
* whether it has that bo already somewhere. */
handle_import2 = prime_fd_to_handle(fd2, dma_buf_fd);
igt_assert(handle_import1 == handle_import2);
igt_assert_eq_u32(handle_import1, handle_import2);
/* Same for re-importing on the exporting fd. */
handle_selfimport = prime_fd_to_handle(fd1, dma_buf_fd);
igt_assert(handle == handle_selfimport);
igt_assert_eq_u32(handle, handle_selfimport);
/* close dma_buf, check whether nothing disappears. */
close(dma_buf_fd);
@ -225,7 +225,7 @@ static int get_object_count(void)
file = igt_debugfs_fopen("i915_gem_objects", "r");
scanned = fscanf(file, "%i objects", &ret);
igt_assert(scanned == 1);
igt_assert_eq(scanned, 1);
return ret;
}
@ -278,7 +278,7 @@ static void test_reimport_close_race(void)
r = pthread_create(&threads[i], NULL,
thread_fn_reimport_vs_close,
(void *)(uintptr_t)fds);
igt_assert(r == 0);
igt_assert_eq(r, 0);
}
sleep(5);
@ -360,7 +360,7 @@ static void test_export_close_race(void)
r = pthread_create(&threads[i], NULL,
thread_fn_export_vs_close,
(void *)(uintptr_t)fd);
igt_assert(r == 0);
igt_assert_eq(r, 0);
}
sleep(5);

6
tests/testdisplay.c
View File

@ -605,7 +605,7 @@ static void enter_exec_path( char **argv )
*(pos+1) = '\0';
ret = chdir(exec_path);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
free(exec_path);
}
@ -708,7 +708,7 @@ int main(int argc, char **argv)
exit(IGT_EXIT_INVALID);
break;
case HELP_DESCRIPTION:
printf("Tests display functionality.");
igt_info("Tests display functionality.");
exit(0);
break;
default:
@ -793,7 +793,7 @@ out_mainloop:
out_close:
close(drm_fd);
igt_assert(ret == 0);
igt_assert_eq(ret, 0);
igt_exit();
}