mirror of
https://github.com/ioacademy-jikim/debugging
synced 2025-06-11 09:56:29 +00:00
183 lines
4.9 KiB
C
183 lines
4.9 KiB
C
#include <stdio.h>
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/* Dummy variable. Needed to work around GCC code generation bugs */
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volatile long v;
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#define OR_REG_MEM(insn, s1, s2) \
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({ \
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unsigned long tmp = s1; \
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int cc; \
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asm volatile( #insn " %0, %3\n" \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp), "Q" (s2) \
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: "0", "cc"); \
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printf(#insn " %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \
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})
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#define OR_REG_REG(insn, s1, s2) \
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({ \
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unsigned long tmp = s1; \
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int cc; \
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asm volatile( #insn " %0, %3\n" \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp), "d" (s2) \
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: "0", "cc"); \
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printf(#insn " %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \
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})
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#define OR_REG_IMM(insn, s1, s2) \
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({ \
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register unsigned long tmp asm("2") = s1; \
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int cc; \
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asm volatile( insn(2,s2) \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp) \
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: "cc"); \
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v = tmp; /* work around GCC code gen bug */ \
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printf(#insn " %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) 0x##s2, v, cc); \
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})
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#define OR_MEM_IMM(insn, s1, s2) \
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({ \
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unsigned long tmp = s1; \
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int cc; \
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asm volatile( #insn " %0," #s2 "\n" \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+Q" (tmp), "=d" (cc) \
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: "Q" (tmp) \
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: "0", "cc"); \
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printf(#insn " %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \
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})
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#define memsweep(i, s2) \
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({ \
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OR_REG_MEM(i, 0ul, s2); \
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OR_REG_MEM(i, 1ul, s2); \
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OR_REG_MEM(i, 0xfffful, s2); \
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OR_REG_MEM(i, 0x7ffful, s2); \
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OR_REG_MEM(i, 0x8000ul, s2); \
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OR_REG_MEM(i, 0xfffffffful, s2); \
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OR_REG_MEM(i, 0x80000000ul, s2); \
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OR_REG_MEM(i, 0x7ffffffful, s2); \
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OR_REG_MEM(i, 0xaaaaaaaaaaaaaaaaul, s2); \
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OR_REG_MEM(i, 0x8000000000000000ul, s2); \
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OR_REG_MEM(i, 0xfffffffffffffffful, s2); \
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OR_REG_MEM(i, 0x5555555555555555ul, s2); \
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})
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#define regsweep(i, s2) \
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({ \
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OR_REG_REG(i, 0ul, s2); \
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OR_REG_REG(i, 1ul, s2); \
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OR_REG_REG(i, 0xfffful, s2); \
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OR_REG_REG(i, 0x7ffful, s2); \
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OR_REG_REG(i, 0x8000ul, s2); \
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OR_REG_REG(i, 0xfffffffful, s2); \
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OR_REG_REG(i, 0x80000000ul, s2); \
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OR_REG_REG(i, 0x7ffffffful, s2); \
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OR_REG_REG(i, 0xaaaaaaaaaaaaaaaaul, s2); \
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OR_REG_REG(i, 0x8000000000000000ul, s2); \
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OR_REG_REG(i, 0xfffffffffffffffful, s2); \
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OR_REG_REG(i, 0x5555555555555555ul, s2); \
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})
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#define immsweep(i, s2) \
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({ \
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OR_REG_IMM(i, 0ul, s2); \
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OR_REG_IMM(i, 1ul, s2); \
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OR_REG_IMM(i, 0xfffful, s2); \
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OR_REG_IMM(i, 0x7ffful, s2); \
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OR_REG_IMM(i, 0x8000ul, s2); \
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OR_REG_IMM(i, 0xfffffffful, s2); \
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OR_REG_IMM(i, 0x80000000ul, s2); \
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OR_REG_IMM(i, 0x7ffffffful, s2); \
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OR_REG_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \
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OR_REG_IMM(i, 0x8000000000000000ul, s2); \
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OR_REG_IMM(i, 0xfffffffffffffffful, s2); \
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OR_REG_IMM(i, 0x5555555555555555ul, s2); \
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})
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#define memimmsweep(i, s2) \
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({ \
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OR_MEM_IMM(i, 0ul, s2); \
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OR_MEM_IMM(i, 1ul, s2); \
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OR_MEM_IMM(i, 0xfffful, s2); \
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OR_MEM_IMM(i, 0x7ffful, s2); \
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OR_MEM_IMM(i, 0x8000ul, s2); \
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OR_MEM_IMM(i, 0xfffffffful, s2); \
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OR_MEM_IMM(i, 0x80000000ul, s2); \
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OR_MEM_IMM(i, 0x7ffffffful, s2); \
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OR_MEM_IMM(i, 0xaaaaaaaaaaaaaaaaul, s2); \
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OR_MEM_IMM(i, 0x8000000000000000ul, s2); \
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OR_MEM_IMM(i, 0xfffffffffffffffful, s2); \
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OR_MEM_IMM(i, 0x5555555555555555ul, s2); \
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})
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#define OR_OY(s1, s2) \
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({ \
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register unsigned long tmp asm("1") = s1; \
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register unsigned long *addr asm("2") = &s2; \
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int cc; \
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asm volatile( OY(1,0,2,000,00) \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp), "d"(addr) \
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: "cc"); \
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printf("oy %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \
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})
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#define OR_OIY(s1, i2) \
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({ \
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unsigned long tmp = s1; \
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register unsigned long *addr asm("2") = &tmp; \
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int cc; \
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asm volatile( OIY(i2,2,000,00) \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+Q" (tmp), "=d" (cc) \
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: "Q" (tmp), "d" (addr) \
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: "cc"); \
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printf("oiy %16.16lX | %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) 0x##i2, tmp, cc); \
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})
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#define oysweep(s2) \
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({ \
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OR_OY(0ul, s2); \
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OR_OY(1ul, s2); \
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OR_OY(0xfffful, s2); \
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OR_OY(0x7ffful, s2); \
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OR_OY(0x8000ul, s2); \
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OR_OY(0xfffffffful, s2); \
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OR_OY(0x80000000ul, s2); \
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OR_OY(0x7ffffffful, s2); \
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OR_OY(0xaaaaaaaaaaaaaaaaul, s2); \
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OR_OY(0x8000000000000000ul, s2); \
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OR_OY(0xfffffffffffffffful, s2); \
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OR_OY(0x5555555555555555ul, s2); \
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})
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#define oiysweep(s2) \
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({ \
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OR_OIY(0ul, s2); \
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OR_OIY(1ul, s2); \
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OR_OIY(0xfffful, s2); \
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OR_OIY(0x7ffful, s2); \
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OR_OIY(0x8000ul, s2); \
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OR_OIY(0xfffffffful, s2); \
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OR_OIY(0x80000000ul, s2); \
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OR_OIY(0x7ffffffful, s2); \
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OR_OIY(0xaaaaaaaaaaaaaaaaul, s2); \
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OR_OIY(0x8000000000000000ul, s2); \
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OR_OIY(0xfffffffffffffffful, s2); \
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OR_OIY(0x5555555555555555ul, s2); \
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})
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