mirror of
https://github.com/ioacademy-jikim/debugging
synced 2025-06-11 18:06:21 +00:00
207 lines
6.8 KiB
C
207 lines
6.8 KiB
C
#include <stdio.h>
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/* Dummy variable. Needed to work around GCC code generation bugs */
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volatile long v;
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#define ADD_REG_MEM(insn, s1, s2, CARRY) \
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({ \
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unsigned long tmp = s1; \
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int cc; \
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asm volatile( "lghi 0," #CARRY "\n" \
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"aghi 0, 0\n" \
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#insn " %0, %3\n" \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp), "Q" (s2) \
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: "0", "cc"); \
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printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \
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})
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#define ADD_REG_REG(insn, s1, s2, CARRY) \
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({ \
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unsigned long tmp = s1; \
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int cc; \
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asm volatile( "lghi 0," #CARRY "\n" \
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"aghi 0, 0\n" \
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#insn " %0, %3\n" \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp), "d" (s2) \
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: "0", "cc"); \
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printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, s2, tmp, cc); \
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})
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#define ADD_REG_IMM(insn, s1, s2, CARRY) \
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({ \
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unsigned long tmp = s1; \
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int cc; \
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asm volatile( "lghi 0," #CARRY "\n" \
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"aghi 0, 0\n" \
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#insn " %0," #s2 "\n" \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp) \
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: "0", "cc"); \
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printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) s2, tmp, cc); \
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})
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#define ADD_MEM_IMM(insn, s1, s2, CARRY) \
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({ \
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unsigned long tmp = s1, v2; \
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register unsigned long *addr asm("5") = &tmp; \
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int cc; \
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asm volatile( "lghi 0," #CARRY "\n" \
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"aghi 0, 0\n" \
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insn(s2,5,000,00) \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+Q" (tmp), "=d" (cc) \
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: "Q" (tmp), "d" (addr) \
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: "0", "cc"); \
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v2 = (((signed long)((unsigned long)0x##s2 << 56)) >> 56); \
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printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, v2, tmp, cc); \
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})
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#define memsweep(i, s2, carryset) \
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({ \
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ADD_REG_MEM(i, 0ul, s2, carryset); \
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ADD_REG_MEM(i, 1ul, s2, carryset); \
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ADD_REG_MEM(i, 0xfffful, s2, carryset); \
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ADD_REG_MEM(i, 0x7ffful, s2, carryset); \
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ADD_REG_MEM(i, 0x8000ul, s2, carryset); \
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ADD_REG_MEM(i, 0xfffffffful, s2, carryset); \
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ADD_REG_MEM(i, 0x80000000ul, s2, carryset); \
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ADD_REG_MEM(i, 0x7ffffffful, s2, carryset); \
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ADD_REG_MEM(i, 0xfffffffffffffffful, s2, carryset); \
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ADD_REG_MEM(i, 0x8000000000000000ul, s2, carryset); \
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ADD_REG_MEM(i, 0x7ffffffffffffffful, s2, carryset); \
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})
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#define regsweep(i, s2, carryset) \
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({ \
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ADD_REG_REG(i, 0ul, s2, carryset); \
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ADD_REG_REG(i, 1ul, s2, carryset); \
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ADD_REG_REG(i, 0xfffful, s2, carryset); \
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ADD_REG_REG(i, 0x7ffful, s2, carryset); \
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ADD_REG_REG(i, 0x8000ul, s2, carryset); \
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ADD_REG_REG(i, 0xfffffffful, s2, carryset); \
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ADD_REG_REG(i, 0x80000000ul, s2, carryset); \
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ADD_REG_REG(i, 0x7ffffffful, s2, carryset); \
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ADD_REG_REG(i, 0xfffffffffffffffful, s2, carryset); \
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ADD_REG_REG(i, 0x8000000000000000ul, s2, carryset); \
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ADD_REG_REG(i, 0x7ffffffffffffffful, s2, carryset); \
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})
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#define immsweep(i, s2, carryset) \
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({ \
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ADD_REG_IMM(i, 0ul, s2, carryset); \
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ADD_REG_IMM(i, 1ul, s2, carryset); \
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ADD_REG_IMM(i, 0xfffful, s2, carryset); \
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ADD_REG_IMM(i, 0x7ffful, s2, carryset); \
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ADD_REG_IMM(i, 0x8000ul, s2, carryset); \
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ADD_REG_IMM(i, 0xfffffffful, s2, carryset); \
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ADD_REG_IMM(i, 0x80000000ul, s2, carryset); \
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ADD_REG_IMM(i, 0x7ffffffful, s2, carryset); \
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ADD_REG_IMM(i, 0xfffffffffffffffful, s2, carryset); \
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ADD_REG_IMM(i, 0x8000000000000000ul, s2, carryset); \
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ADD_REG_IMM(i, 0x7ffffffffffffffful, s2, carryset); \
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})
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#define memimmsweep(i, s2, carryset) \
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({ \
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ADD_MEM_IMM(i, 0ul, s2, carryset); \
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ADD_MEM_IMM(i, 1ul, s2, carryset); \
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ADD_MEM_IMM(i, 0xfffful, s2, carryset); \
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ADD_MEM_IMM(i, 0x7ffful, s2, carryset); \
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ADD_MEM_IMM(i, 0x8000ul, s2, carryset); \
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ADD_MEM_IMM(i, 0xfffffffful, s2, carryset); \
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ADD_MEM_IMM(i, 0x80000000ul, s2, carryset); \
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ADD_MEM_IMM(i, 0x7ffffffful, s2, carryset); \
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ADD_MEM_IMM(i, 0xfffffffffffffffful, s2, carryset); \
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ADD_MEM_IMM(i, 0x8000000000000000ul, s2, carryset); \
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ADD_MEM_IMM(i, 0x7ffffffffffffffful, s2, carryset); \
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})
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#define ahysweep(i, s2, carryset) \
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({ \
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ADD_REG_MEM(i, 0ul, s2, carryset); \
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ADD_REG_MEM(i, 1ul, s2, carryset); \
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ADD_REG_MEM(i, 0xfffful, s2, carryset); \
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ADD_REG_MEM(i, 0x7ffful, s2, carryset); \
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ADD_REG_MEM(i, 0x8000ul, s2, carryset); \
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ADD_REG_MEM(i, 0xfffffffful, s2, carryset); \
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ADD_REG_MEM(i, 0x80000000ul, s2, carryset); \
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ADD_REG_MEM(i, 0x7ffffffful, s2, carryset); \
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ADD_REG_MEM(i, 0xfffffffffffffffful, s2, carryset); \
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ADD_REG_MEM(i, 0x8000000000000000ul, s2, carryset); \
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ADD_REG_MEM(i, 0x7ffffffffffffffful, s2, carryset); \
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})
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#define ADD_REG_LDISP(insn, s1, s2, CARRY) \
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({ \
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register unsigned long tmp asm("2") = s1; \
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register unsigned long *addr asm("5") = &s2; \
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int cc; \
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asm volatile( "lghi 0," #CARRY "\n" \
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"aghi 0, 0\n" \
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insn(2,0,5,000,00) \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp), "Q" (s2), "d"(addr) \
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: "cc"); \
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v = tmp; /* work around GCC code gen bug */ \
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printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, s2, v, cc); \
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})
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#define ldispsweep(i, s2, carryset) \
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({ \
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ADD_REG_LDISP(i, 0ul, s2, carryset); \
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ADD_REG_LDISP(i, 1ul, s2, carryset); \
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ADD_REG_LDISP(i, 0xfffful, s2, carryset); \
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ADD_REG_LDISP(i, 0x7ffful, s2, carryset); \
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ADD_REG_LDISP(i, 0x8000ul, s2, carryset); \
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ADD_REG_LDISP(i, 0xfffffffful, s2, carryset); \
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ADD_REG_LDISP(i, 0x80000000ul, s2, carryset); \
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ADD_REG_LDISP(i, 0x7ffffffful, s2, carryset); \
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ADD_REG_LDISP(i, 0xfffffffffffffffful, s2, carryset); \
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ADD_REG_LDISP(i, 0x8000000000000000ul, s2, carryset); \
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ADD_REG_LDISP(i, 0x7ffffffffffffffful, s2, carryset); \
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})
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#define ADD_REG_XIMM(insn, s1, us2,s2, CARRY) \
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({ \
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register unsigned long tmp asm("2") = s1; \
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int cc; \
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asm volatile( "lghi 0," #CARRY "\n" \
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"aghi 0, 0\n" \
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insn(2,s2) \
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"ipm %1\n" \
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"srl %1,28\n" \
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: "+d" (tmp), "=d" (cc) \
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: "d" (tmp) \
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: "0", "cc"); \
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v = tmp; /* work around GCC code gen bug */ \
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printf(#insn " " #CARRY " + %16.16lX + %16.16lX = %16.16lX (cc=%d)\n", s1, (unsigned long) 0x##us2##s2, v, cc); \
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})
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#define ximmsweep(i, us2, s2, carryset) \
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({ \
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ADD_REG_XIMM(i, 0ul, us2, s2, carryset); \
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ADD_REG_XIMM(i, 1ul, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0xfffful, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0x7ffful, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0x8000ul, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0xfffffffful, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0x80000000ul, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0x7ffffffful, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0xfffffffffffffffful, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0x8000000000000000ul, us2, s2, carryset); \
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ADD_REG_XIMM(i, 0x7ffffffffffffffful, us2, s2, carryset); \
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})
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