mirror of
https://github.com/ioacademy-jikim/debugging
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295 lines
11 KiB
C
295 lines
11 KiB
C
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/*---------------------------------------------------------------*/
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/*--- begin libvex_guest_ppc32.h ---*/
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/*---------------------------------------------------------------*/
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/*
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This file is part of Valgrind, a dynamic binary instrumentation
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framework.
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Copyright (C) 2004-2015 OpenWorks LLP
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info@open-works.net
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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02110-1301, USA.
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The GNU General Public License is contained in the file COPYING.
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Neither the names of the U.S. Department of Energy nor the
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University of California nor the names of its contributors may be
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used to endorse or promote products derived from this software
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without prior written permission.
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*/
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#ifndef __LIBVEX_PUB_GUEST_PPC32_H
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#define __LIBVEX_PUB_GUEST_PPC32_H
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#include "libvex_basictypes.h"
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/*---------------------------------------------------------------*/
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/*--- Vex's representation of the PPC32 CPU state ---*/
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/*---------------------------------------------------------------*/
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#define VEX_GUEST_PPC32_REDIR_STACK_SIZE (16/*entries*/ * 2/*words per entry*/)
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typedef
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struct {
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/* Event check fail addr and counter. */
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/* 0 */ UInt host_EvC_FAILADDR;
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/* 4 */ UInt host_EvC_COUNTER;
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/* 8 */ UInt pad3;
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/* 12 */ UInt pad4;
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/* Add 16 to all the numbers below. Sigh. */
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/* General Purpose Registers */
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/* 0 */ UInt guest_GPR0;
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/* 4 */ UInt guest_GPR1;
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/* 8 */ UInt guest_GPR2;
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/* 12 */ UInt guest_GPR3;
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/* 16 */ UInt guest_GPR4;
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/* 20 */ UInt guest_GPR5;
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/* 24 */ UInt guest_GPR6;
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/* 28 */ UInt guest_GPR7;
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/* 32 */ UInt guest_GPR8;
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/* 36 */ UInt guest_GPR9;
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/* 40 */ UInt guest_GPR10;
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/* 44 */ UInt guest_GPR11;
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/* 48 */ UInt guest_GPR12;
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/* 52 */ UInt guest_GPR13;
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/* 56 */ UInt guest_GPR14;
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/* 60 */ UInt guest_GPR15;
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/* 64 */ UInt guest_GPR16;
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/* 68 */ UInt guest_GPR17;
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/* 72 */ UInt guest_GPR18;
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/* 76 */ UInt guest_GPR19;
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/* 80 */ UInt guest_GPR20;
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/* 84 */ UInt guest_GPR21;
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/* 88 */ UInt guest_GPR22;
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/* 92 */ UInt guest_GPR23;
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/* 96 */ UInt guest_GPR24;
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/* 100 */ UInt guest_GPR25;
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/* 104 */ UInt guest_GPR26;
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/* 108 */ UInt guest_GPR27;
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/* 112 */ UInt guest_GPR28;
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/* 116 */ UInt guest_GPR29;
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/* 120 */ UInt guest_GPR30;
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/* 124 */ UInt guest_GPR31;
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// Vector Registers, Floating Point Registers, and VSX Registers
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// With ISA 2.06, the "Vector-Scalar Floating-point" category
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// provides facilities to support vector and scalar binary floating-
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// point operations. A unified register file is an integral part
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// of this new facility, combining floating point and vector registers
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// using a 64x128-bit vector. These are referred to as VSR[0..63].
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// The floating point registers are now mapped into double word element 0
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// of VSR[0..31]. The 32x128-bit vector registers defined by the "Vector
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// Facility [Category: Vector]" are now mapped to VSR[32..63].
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// IMPORTANT: the user of libvex must place the guest state so as
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// to ensure that guest_VSR{0..63}, and any shadows thereof, are
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// 16-aligned.
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/* 128 */ U128 guest_VSR0;
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/* 144 */ U128 guest_VSR1;
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/* 160 */ U128 guest_VSR2;
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/* 176 */ U128 guest_VSR3;
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/* 192 */ U128 guest_VSR4;
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/* 208 */ U128 guest_VSR5;
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/* 224 */ U128 guest_VSR6;
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/* 240 */ U128 guest_VSR7;
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/* 256 */ U128 guest_VSR8;
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/* 272 */ U128 guest_VSR9;
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/* 288 */ U128 guest_VSR10;
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/* 304 */ U128 guest_VSR11;
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/* 320 */ U128 guest_VSR12;
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/* 336 */ U128 guest_VSR13;
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/* 352 */ U128 guest_VSR14;
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/* 368 */ U128 guest_VSR15;
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/* 384 */ U128 guest_VSR16;
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/* 400 */ U128 guest_VSR17;
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/* 416 */ U128 guest_VSR18;
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/* 432 */ U128 guest_VSR19;
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/* 448 */ U128 guest_VSR20;
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/* 464 */ U128 guest_VSR21;
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/* 480 */ U128 guest_VSR22;
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/* 496 */ U128 guest_VSR23;
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/* 512 */ U128 guest_VSR24;
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/* 528 */ U128 guest_VSR25;
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/* 544 */ U128 guest_VSR26;
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/* 560 */ U128 guest_VSR27;
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/* 576 */ U128 guest_VSR28;
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/* 592 */ U128 guest_VSR29;
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/* 608 */ U128 guest_VSR30;
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/* 624 */ U128 guest_VSR31;
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/* 640 */ U128 guest_VSR32;
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/* 656 */ U128 guest_VSR33;
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/* 672 */ U128 guest_VSR34;
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/* 688 */ U128 guest_VSR35;
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/* 704 */ U128 guest_VSR36;
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/* 720 */ U128 guest_VSR37;
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/* 736 */ U128 guest_VSR38;
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/* 752 */ U128 guest_VSR39;
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/* 768 */ U128 guest_VSR40;
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/* 784 */ U128 guest_VSR41;
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/* 800 */ U128 guest_VSR42;
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/* 816 */ U128 guest_VSR43;
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/* 832 */ U128 guest_VSR44;
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/* 848 */ U128 guest_VSR45;
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/* 864 */ U128 guest_VSR46;
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/* 880 */ U128 guest_VSR47;
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/* 896 */ U128 guest_VSR48;
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/* 912 */ U128 guest_VSR49;
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/* 928 */ U128 guest_VSR50;
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/* 944 */ U128 guest_VSR51;
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/* 960 */ U128 guest_VSR52;
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/* 976 */ U128 guest_VSR53;
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/* 992 */ U128 guest_VSR54;
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/* 1008 */ U128 guest_VSR55;
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/* 1024 */ U128 guest_VSR56;
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/* 1040 */ U128 guest_VSR57;
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/* 1056 */ U128 guest_VSR58;
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/* 1072 */ U128 guest_VSR59;
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/* 1088 */ U128 guest_VSR60;
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/* 1104 */ U128 guest_VSR61;
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/* 1120 */ U128 guest_VSR62;
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/* 1136 */ U128 guest_VSR63;
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/* 1152 */ UInt guest_CIA; // IP (no arch visible register)
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/* 1156 */ UInt guest_LR; // Link Register
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/* 1160 */ UInt guest_CTR; // Count Register
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/* XER pieces */
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/* 1164 */ UChar guest_XER_SO; /* in lsb */
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/* 1165 */ UChar guest_XER_OV; /* in lsb */
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/* 1166 */ UChar guest_XER_CA; /* in lsb */
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/* 1167 */ UChar guest_XER_BC; /* all bits */
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/* CR pieces */
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/* 1168 */ UChar guest_CR0_321; /* in [3:1] */
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/* 1169 */ UChar guest_CR0_0; /* in lsb */
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/* 1170 */ UChar guest_CR1_321; /* in [3:1] */
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/* 1171 */ UChar guest_CR1_0; /* in lsb */
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/* 1172 */ UChar guest_CR2_321; /* in [3:1] */
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/* 1173 */ UChar guest_CR2_0; /* in lsb */
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/* 1174 */ UChar guest_CR3_321; /* in [3:1] */
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/* 1175 */ UChar guest_CR3_0; /* in lsb */
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/* 1176 */ UChar guest_CR4_321; /* in [3:1] */
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/* 1177 */ UChar guest_CR4_0; /* in lsb */
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/* 1178 */ UChar guest_CR5_321; /* in [3:1] */
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/* 1179 */ UChar guest_CR5_0; /* in lsb */
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/* 1180 */ UChar guest_CR6_321; /* in [3:1] */
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/* 1181 */ UChar guest_CR6_0; /* in lsb */
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/* 1182 */ UChar guest_CR7_321; /* in [3:1] */
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/* 1183 */ UChar guest_CR7_0; /* in lsb */
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/* FP Status & Control Register fields. Only rounding mode fields are supported. */
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/* 1184 */ UChar guest_FPROUND; // Binary Floating Point Rounding Mode
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/* 1185 */ UChar guest_DFPROUND; // Decimal Floating Point Rounding Mode
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/* 1186 */ UChar pad1;
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/* 1187 */ UChar pad2;
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/* Vector Save/Restore Register */
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/* 1188 */ UInt guest_VRSAVE;
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/* Vector Status and Control Register */
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/* 1192 */ UInt guest_VSCR;
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/* Emulation notes */
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/* 1196 */ UInt guest_EMNOTE;
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/* For icbi: record start and length of area to invalidate */
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/* 1200 */ UInt guest_CMSTART;
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/* 1204 */ UInt guest_CMLEN;
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/* Used to record the unredirected guest address at the start of
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a translation whose start has been redirected. By reading
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this pseudo-register shortly afterwards, the translation can
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find out what the corresponding no-redirection address was.
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Note, this is only set for wrap-style redirects, not for
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replace-style ones. */
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/* 1208 */ UInt guest_NRADDR;
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/* 1212 */ UInt guest_NRADDR_GPR2; /* needed by aix */
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/* A grows-upwards stack for hidden saves/restores of LR and R2
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needed for function interception and wrapping on ppc32-aix5.
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A horrible hack. REDIR_SP points to the highest live entry,
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and so starts at -1. */
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/* 1216 */ UInt guest_REDIR_SP;
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/* 1220 */ UInt guest_REDIR_STACK[VEX_GUEST_PPC32_REDIR_STACK_SIZE];
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/* Needed for Darwin (but mandated for all guest architectures):
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CIA at the last SC insn. Used when backing up to restart a
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syscall that has been interrupted by a signal. */
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/* 1348 */ UInt guest_IP_AT_SYSCALL;
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/* SPRG3, which AIUI is readonly in user space. Needed for
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threading on AIX. */
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/* 1352 */ UInt guest_SPRG3_RO;
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/* 1356 */ UInt padding1;
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/* 1360 */ ULong guest_TFHAR; // Transaction Failure Handler Address Register
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/* 1368 */ ULong guest_TEXASR; // Transaction EXception And Summary Register
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/* 1376 */ ULong guest_TFIAR; // Transaction Failure Instruction Address Register
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/* 1384 */ ULong guest_PPR; // Program Priority register
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/* 1392 */ UInt guest_TEXASRU; // Transaction EXception And Summary Register Upper
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/* 1396 */ UInt guest_PSPB; // Problem State Priority Boost register
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/* Padding to make it have an 16-aligned size */
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/* 1400 */ UInt padding2;
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/* 1404 */ UInt padding3;
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}
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VexGuestPPC32State;
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/*---------------------------------------------------------------*/
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/*--- Utility functions for PPC32 guest stuff. ---*/
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/*---------------------------------------------------------------*/
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/* ALL THE FOLLOWING ARE VISIBLE TO LIBRARY CLIENT */
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/* Initialise all guest PPC32 state. */
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extern
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void LibVEX_GuestPPC32_initialise ( /*OUT*/VexGuestPPC32State* vex_state );
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/* Write the given native %CR value to the supplied VexGuestPPC32State
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structure. */
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extern
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void LibVEX_GuestPPC32_put_CR ( UInt cr_native,
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/*OUT*/VexGuestPPC32State* vex_state );
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/* Extract from the supplied VexGuestPPC32State structure the
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corresponding native %CR value. */
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extern
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UInt LibVEX_GuestPPC32_get_CR ( /*IN*/const VexGuestPPC32State* vex_state );
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/* Write the given native %XER value to the supplied VexGuestPPC32State
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structure. */
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extern
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void LibVEX_GuestPPC32_put_XER ( UInt xer_native,
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/*OUT*/VexGuestPPC32State* vex_state );
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/* Extract from the supplied VexGuestPPC32State structure the
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corresponding native %XER value. */
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extern
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UInt LibVEX_GuestPPC32_get_XER ( /*IN*/const VexGuestPPC32State* vex_state );
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#endif /* ndef __LIBVEX_PUB_GUEST_PPC32_H */
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/*---------------------------------------------------------------*/
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/*--- libvex_guest_ppc32.h ---*/
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/*---------------------------------------------------------------*/
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