mirror of
https://github.com/ioacademy-jikim/debugging
synced 2025-06-10 09:26:15 +00:00
479 lines
12 KiB
C
479 lines
12 KiB
C
/* -*- mode: C; c-basic-offset: 3; -*- */
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/*---------------------------------------------------------------*/
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/*--- begin s390_disasm.c ---*/
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/*---------------------------------------------------------------*/
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/*
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This file is part of Valgrind, a dynamic binary instrumentation
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framework.
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Copyright IBM Corp. 2010-2015
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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02110-1301, USA.
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The GNU General Public License is contained in the file COPYING.
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*/
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/* Contributed by Florian Krohm */
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#include <stdarg.h>
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#include "libvex_basictypes.h"
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#include "main_util.h" // vassert
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#include "main_globals.h" // vex_traceflags
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#include "s390_defs.h" // S390_MAX_MNEMONIC_LEN
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#include "s390_disasm.h"
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/* Return the mnemonic padded with blanks to its right */
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static const HChar *
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mnemonic(const HChar *mnm)
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{
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vassert(vex_strlen(mnm) <= S390_MAX_MNEMONIC_LEN);
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static HChar buf[S390_MAX_MNEMONIC_LEN + 1];
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vex_sprintf(buf, "%-*s", S390_MAX_MNEMONIC_LEN, mnm);
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return buf;
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}
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/* Return the name of a general purpose register for dis-assembly purposes. */
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static const HChar *
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gpr_operand(UInt archreg)
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{
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static const HChar names[16][5] = {
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"%r0", "%r1", "%r2", "%r3",
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"%r4", "%r5", "%r6", "%r7",
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"%r8", "%r9", "%r10", "%r11",
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"%r12", "%r13", "%r14", "%r15",
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};
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vassert(archreg < 16);
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return names[archreg];
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}
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/* Return the name of a floating point register for dis-assembly purposes. */
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static const HChar *
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fpr_operand(UInt archreg)
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{
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static const HChar names[16][5] = {
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"%f0", "%f1", "%f2", "%f3",
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"%f4", "%f5", "%f6", "%f7",
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"%f8", "%f9", "%f10", "%f11",
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"%f12", "%f13", "%f14", "%f15",
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};
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vassert(archreg < 16);
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return names[archreg];
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}
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/* Return the name of an access register for dis-assembly purposes. */
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static const HChar *
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ar_operand(UInt archreg)
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{
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static const HChar names[16][5] = {
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"%a0", "%a1", "%a2", "%a3",
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"%a4", "%a5", "%a6", "%a7",
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"%a8", "%a9", "%a10", "%a11",
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"%a12", "%a13", "%a14", "%a15",
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};
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vassert(archreg < 16);
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return names[archreg];
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}
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/* Build and return the extended mnemonic for the compare and branch
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opcodes as introduced by z10. See also the opcodes in file
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opcodes/s390-opc.txt (from binutils) that have a '$' in their name. */
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static const HChar *
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cab_operand(const HChar *base, UInt mask)
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{
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HChar *to;
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const HChar *from;
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static HChar buf[S390_MAX_MNEMONIC_LEN + 1];
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static const HChar suffix[8][3] = {
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"", "h", "l", "ne", "e", "nl", "nh", ""
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};
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/* Guard against buffer overflow */
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vassert(vex_strlen(base) + sizeof suffix[0] <= sizeof buf);
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/* strcpy(buf, from); */
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for (from = base, to = buf; *from; ++from, ++to) {
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*to = *from;
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}
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/* strcat(buf, suffix); */
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for (from = suffix[mask >> 1]; *from; ++from, ++to) {
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*to = *from;
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}
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*to = '\0';
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return buf;
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}
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/* Common function used to construct a mnemonic based on a condition code
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mask. */
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static const HChar *
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construct_mnemonic(const HChar *prefix, const HChar *suffix, UInt mask)
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{
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HChar *to;
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const HChar *from;
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static HChar buf[S390_MAX_MNEMONIC_LEN + 1];
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static HChar mask_id[16][4] = {
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"", /* 0 -> unused */
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"o", "h", "nle", "l", "nhe", "lh", "ne",
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"e", "nlh", "he", "nl", "le", "nh", "no",
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"" /* 15 -> unused */
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};
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/* Guard against buffer overflow */
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vassert(vex_strlen(prefix) + vex_strlen(suffix) +
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sizeof mask_id[0] <= sizeof buf);
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/* strcpy(buf, prefix); */
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for (from = prefix, to = buf; *from; ++from, ++to) {
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*to = *from;
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}
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/* strcat(buf, mask_id); */
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for (from = mask_id[mask]; *from; ++from, ++to) {
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*to = *from;
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}
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/* strcat(buf, suffix); */
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for (from = suffix; *from; ++from, ++to) {
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*to = *from;
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}
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*to = '\0';
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return buf;
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}
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/* Return the special mnemonic for the BCR opcode */
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static const HChar *
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bcr_operand(UInt m1)
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{
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if (m1 == 0) return "nopr";
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if (m1 == 15) return "br";
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return construct_mnemonic("b", "r", m1);
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}
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/* Return the special mnemonic for the BC opcode */
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static const HChar *
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bc_operand(UInt m1)
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{
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if (m1 == 0) return "nop";
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if (m1 == 15) return "b";
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return construct_mnemonic("b", "", m1);
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}
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/* Return the special mnemonic for the BRC opcode */
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static const HChar *
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brc_operand(UInt m1)
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{
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if (m1 == 0) return "brc";
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if (m1 == 15) return "j";
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return construct_mnemonic("j", "", m1);
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}
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/* Return the special mnemonic for the BRCL opcode */
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static const HChar *
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brcl_operand(UInt m1)
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{
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if (m1 == 0) return "brcl";
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if (m1 == 15) return "jg";
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return construct_mnemonic("jg", "", m1);
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}
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/* Return the special mnemonic for a conditional load/store opcode */
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static const HChar *
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cls_operand(Int kind, UInt mask)
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{
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const HChar *prefix;
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switch (kind) {
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case S390_XMNM_LOCR: prefix = "locr"; break;
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case S390_XMNM_LOCGR: prefix = "locgr"; break;
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case S390_XMNM_LOC: prefix = "loc"; break;
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case S390_XMNM_LOCG: prefix = "locg"; break;
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case S390_XMNM_STOC: prefix = "stoc"; break;
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case S390_XMNM_STOCG: prefix = "stocg"; break;
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default:
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vpanic("cls_operand");
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}
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return construct_mnemonic(prefix, "", mask);
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}
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/* An operand with a base register, an index register, and a displacement.
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If the displacement is signed, the rightmost 20 bit of D need to be
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sign extended */
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static HChar *
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dxb_operand(HChar *p, UInt d, UInt x, UInt b, Bool displacement_is_signed)
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{
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if (displacement_is_signed) {
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Int displ = (Int)(d << 12) >> 12; /* sign extend */
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p += vex_sprintf(p, "%d", displ);
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} else {
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p += vex_sprintf(p, "%u", d);
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}
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if (x != 0) {
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p += vex_sprintf(p, "(%s", gpr_operand(x));
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if (b != 0) {
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p += vex_sprintf(p, ",%s", gpr_operand(b));
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}
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p += vex_sprintf(p, ")");
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} else {
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if (b != 0) {
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p += vex_sprintf(p, "(%s)", gpr_operand(b));
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}
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}
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return p;
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}
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/* An operand with base register, unsigned length, and a 12-bit
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unsigned displacement */
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static HChar *
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udlb_operand(HChar *p, UInt d, UInt length, UInt b)
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{
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p += vex_sprintf(p, "%u", d);
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p += vex_sprintf(p, "(%u", length + 1); // actual length is +1
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if (b != 0) {
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p += vex_sprintf(p, ",%s", gpr_operand(b));
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}
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p += vex_sprintf(p, ")");
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return p;
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}
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/* The first argument is the command that says how to write the disassembled
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insn. It is understood that the mnemonic comes first and that arguments
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are separated by a ','. The command holds the arguments. Each argument is
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encoded using a 4-bit S390_ARG_xyz value. The first argument is placed
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in the least significant bits of the command and so on. There are at most
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5 arguments in an insn and a sentinel (S390_ARG_DONE) is needed to identify
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the end of the argument list. 6 * 4 = 24 bits are required for the
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command. */
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void
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s390_disasm(UInt command, ...)
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{
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va_list args;
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UInt argkind;
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HChar buf[128]; /* holds the disassembled insn */
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HChar *p;
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HChar separator;
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Int mask_suffix = -1;
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va_start(args, command);
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p = buf;
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separator = 0;
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while (42) {
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argkind = command & 0xF;
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command >>= 4;
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if (argkind == S390_ARG_DONE) goto done;
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if (argkind == S390_ARG_CABM) separator = 0; /* optional */
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/* Write out the separator */
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if (separator) *p++ = separator;
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/* argument */
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switch (argkind) {
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case S390_ARG_MNM:
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p += vex_sprintf(p, "%s", mnemonic(va_arg(args, HChar *)));
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separator = ' ';
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continue;
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case S390_ARG_XMNM: {
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UInt mask, kind;
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const HChar *mnm;
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kind = va_arg(args, UInt);
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separator = ' ';
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switch (kind) {
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case S390_XMNM_BC:
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case S390_XMNM_BCR:
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mask = va_arg(args, UInt);
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mnm = kind == S390_XMNM_BCR ? bcr_operand(mask) : bc_operand(mask);
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p += vex_sprintf(p, "%s", mnemonic(mnm));
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/* mask == 0 is a NOP and has no argument */
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if (mask == 0) goto done;
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break;
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case S390_XMNM_BRC:
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case S390_XMNM_BRCL:
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mask = va_arg(args, UInt);
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mnm = kind == S390_XMNM_BRC ? brc_operand(mask) : brcl_operand(mask);
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p += vex_sprintf(p, "%s", mnemonic(mnm));
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/* mask == 0 has no special mnemonic */
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if (mask == 0) {
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p += vex_sprintf(p, " 0");
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separator = ',';
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}
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break;
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case S390_XMNM_CAB:
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mnm = va_arg(args, HChar *);
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mask = va_arg(args, UInt);
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p += vex_sprintf(p, "%s", mnemonic(cab_operand(mnm, mask)));
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break;
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case S390_XMNM_LOCR:
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case S390_XMNM_LOCGR:
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case S390_XMNM_LOC:
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case S390_XMNM_LOCG:
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case S390_XMNM_STOC:
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case S390_XMNM_STOCG:
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mask = va_arg(args, UInt);
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mnm = cls_operand(kind, mask);
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p += vex_sprintf(p, "%s", mnemonic(mnm));
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/* There are no special opcodes when mask == 0 or 15. In that case
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the integer mask is appended as the final operand */
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if (mask == 0 || mask == 15) mask_suffix = mask;
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break;
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}
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}
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continue;
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case S390_ARG_GPR:
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p += vex_sprintf(p, "%s", gpr_operand(va_arg(args, UInt)));
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break;
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case S390_ARG_FPR:
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p += vex_sprintf(p, "%s", fpr_operand(va_arg(args, UInt)));
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break;
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case S390_ARG_AR:
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p += vex_sprintf(p, "%s", ar_operand(va_arg(args, UInt)));
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break;
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case S390_ARG_UINT:
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p += vex_sprintf(p, "%u", va_arg(args, UInt));
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break;
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case S390_ARG_INT:
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p += vex_sprintf(p, "%d", (Int)(va_arg(args, UInt)));
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break;
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case S390_ARG_PCREL: {
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Long offset = va_arg(args, Int);
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/* Convert # halfwords to # bytes */
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offset <<= 1;
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if (offset < 0) {
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p += vex_sprintf(p, ".%lld", offset);
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} else {
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p += vex_sprintf(p, ".+%lld", offset);
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}
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break;
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}
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case S390_ARG_SDXB: {
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UInt dh, dl, x, b;
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dh = va_arg(args, UInt);
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dl = va_arg(args, UInt);
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x = va_arg(args, UInt);
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b = va_arg(args, UInt);
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p = dxb_operand(p, (dh << 12) | dl, x, b, 1 /* signed_displacement */);
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break;
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}
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case S390_ARG_UDXB: {
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UInt d, x, b;
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d = va_arg(args, UInt);
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x = va_arg(args, UInt);
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b = va_arg(args, UInt);
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p = dxb_operand(p, d, x, b, 0 /* signed_displacement */);
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break;
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}
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case S390_ARG_UDLB: {
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UInt d, l, b;
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d = va_arg(args, UInt);
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l = va_arg(args, UInt);
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b = va_arg(args, UInt);
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p = udlb_operand(p, d, l, b);
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break;
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}
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case S390_ARG_CABM: {
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UInt mask;
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mask = va_arg(args, UInt) & 0xE;
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if (mask == 0 || mask == 14) {
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p += vex_sprintf(p, ",%u", mask);
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}
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break;
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}
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}
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separator = ',';
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}
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done:
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va_end(args);
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if (mask_suffix != -1)
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p += vex_sprintf(p, ",%d", mask_suffix);
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*p = '\0';
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vassert(p < buf + sizeof buf); /* detect buffer overwrite */
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/* Finally, write out the disassembled insn */
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vex_printf("%s\n", buf);
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}
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/*---------------------------------------------------------------*/
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/*--- end s390_disasm.c ---*/
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/*---------------------------------------------------------------*/
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