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jikim
2015-12-13 22:34:58 +09:00
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02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/.deps/power_ISA2_05-power_ISA2_05.Po
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# dummy
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/.deps/power_ISA2_07-power_ISA2_07.Po
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# dummy
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/Makefile
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02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/Makefile.am
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mkdir -p $(inplacedir); \
for f in $(noinst_DSYMS); do \
rm -f $(inplacedir)/$$f.dSYM; \
ln -f -s ../$(subdir)/$$f.dSYM $(inplacedir); \
done
# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
# "make install". It copies $(noinst_PROGRAMS) into $prefix/lib/valgrind/.
# It needs to be depended on by an 'install-exec-local' rule.
install-noinst_PROGRAMS: $(noinst_PROGRAMS)
$(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
for f in $(noinst_PROGRAMS); do \
$(INSTALL_PROGRAM) $$f $(DESTDIR)$(pkglibdir); \
done
# This is used by coregrind/Makefile.am and by <tool>/Makefile.am for doing
# "make uninstall". It removes $(noinst_PROGRAMS) from $prefix/lib/valgrind/.
# It needs to be depended on by an 'uninstall-local' rule.
uninstall-noinst_PROGRAMS:
for f in $(noinst_PROGRAMS); do \
rm -f $(DESTDIR)$(pkglibdir)/$$f; \
done
# Similar to install-noinst_PROGRAMS.
# Nb: we don't use $(INSTALL_PROGRAM) here because it doesn't work with
# directories. XXX: not sure whether the resulting permissions will be
# correct when using 'cp -R'...
install-noinst_DSYMS: build-noinst_DSYMS
$(mkinstalldirs) $(DESTDIR)$(pkglibdir); \
for f in $(noinst_DSYMS); do \
cp -R $$f.dSYM $(DESTDIR)$(pkglibdir); \
done
# Similar to uninstall-noinst_PROGRAMS.
uninstall-noinst_DSYMS:
for f in $(noinst_DSYMS); do \
rm -f $(DESTDIR)$(pkglibdir)/$$f.dSYM; \
done
# This needs to be depended on by a 'clean-local' rule.
clean-noinst_DSYMS:
for f in $(noinst_DSYMS); do \
rm -rf $$f.dSYM; \
done
check-local: build-noinst_DSYMS
clean-local: clean-noinst_DSYMS
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/filter_stderr
Executable
+3
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@@ -0,0 +1,3 @@
#! /bin/sh
../filter_stderr "$@"
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_05.c
+201
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@@ -0,0 +1,201 @@
#include <stdio.h>
#include <config.h>
double foo = -1.0;
double FRT1;
double FRT2;
int base256(int val)
{
/* interpret the bitstream representing val as a base 256 number for testing
* the parity instrs
*/
int sum = 0;
int scale = 1;
int i;
for (i = 0; i < 8; i++) {
int bit = val & 1;
sum = sum + bit * scale;
val <<= 1;
scale *= 256;
}
return sum;
}
void test_parity_instrs()
{
unsigned int word;
int i, parity;
for (i = 0; i < 50; i++) {
word = base256(i);
#ifdef __powerpc64__
unsigned long long_word = word;
__asm__ volatile ("prtyd %0, %1":"=r" (parity):"r"(long_word));
printf("prtyd (%x) => parity=%x\n", i, parity);
#endif
__asm__ volatile ("prtyw %0, %1":"=r" (parity):"r"(word));
printf("prtyw (%x) => parity=%x\n", i, parity);
}
}
void test_lfiwax()
{
unsigned long base;
// unsigned long offset;
typedef struct {
unsigned int hi;
unsigned int lo;
} int_pair_t;
int_pair_t *ip;
foo = -1024.0;
base = (unsigned long) &foo;
__asm__ volatile ("lfiwax %0, 0, %1":"=f" (FRT1):"r"(base));
ip = (int_pair_t *) & FRT1;
printf("lfiwax (%f) => FRT=(%x, %x)\n", foo, ip->hi, ip->lo);
}
/* lfdp FPp, DS(RA) : load float double pair
** FPp = leftmost 64 bits stored at DS(RA)
** FPp+1= rightmost 64 bits stored at DS(RA)
** FPp must be an even float register
**
** The [st|l]fdp[x] instructions were put into the "Floating-Point.Phased-Out"
** category in ISA 2.06 (i.e., POWER7 timeframe). If valgrind and its
** testsuite are built with -mcpu=power7 (or later), then the assembler will
** not recognize those phased out instructions.
*/
void test_double_pair_instrs()
{
#ifdef HAVE_AS_PPC_FPPO
typedef struct {
double hi;
double lo;
} dbl_pair_t;
/* the following decls are for alignment */
int i;
dbl_pair_t dbl_pair[3]; /* must be quad word aligned */
unsigned long base;
unsigned long offset;
for (i = 0; i < 3; i++) {
dbl_pair[i].hi = -1024.0 + i;
dbl_pair[i].lo = 1024.0 + i + 1;
}
__asm__ volatile ("lfdp 10, %0"::"m" (dbl_pair[0]));
__asm__ volatile ("fmr %0, 10":"=d" (FRT1));
__asm__ volatile ("fmr %0, 11":"=d" (FRT2));
printf("lfdp (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
dbl_pair[0].hi, dbl_pair[0].lo, FRT1, FRT2);
FRT1 = 2.2048;
FRT2 = -4.1024;
__asm__ volatile ("fmr 10, %0"::"d" (FRT1));
__asm__ volatile ("fmr 11, %0"::"d" (FRT2));
__asm__ volatile ("stfdp 10, %0"::"m" (dbl_pair[1]));
printf("stfdp (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
FRT1, FRT2, dbl_pair[1].hi, dbl_pair[1].lo);
FRT1 = 0.0;
FRT2 = -1.0;
base = (unsigned long) &dbl_pair;
offset = (unsigned long) &dbl_pair[1] - base;
__asm__ volatile ("ori 20, %0, 0"::"r" (base));
__asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("lfdpx 10, 20, 21");
__asm__ volatile ("fmr %0, 10":"=d" (FRT1));
__asm__ volatile ("fmr %0, 11":"=d" (FRT2));
printf("lfdpx (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
dbl_pair[1].hi, dbl_pair[1].lo, FRT1, FRT2);
FRT1 = 8.2048;
FRT2 = -16.1024;
base = (unsigned long) &dbl_pair;
offset = (unsigned long) &dbl_pair[2] - base;
__asm__ volatile ("ori 20, %0, 0"::"r" (base));
__asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("fmr 10, %0 "::"d" (FRT1));
__asm__ volatile ("fmr 11, %0 "::"d" (FRT2));
__asm__ volatile ("stfdpx 10, 20, 21");
printf("stfdpx (%lf, %lf) => F_hi=%lf, F_lo=%lf\n",
FRT1, FRT2, dbl_pair[2].hi, dbl_pair[2].lo);
#endif
}
/* The contents of FRB with bit set 0 set to bit 0 of FRA copied into FRT */
void test_fcpsgn()
{
double A[] = {
10.101010,
-0.0,
0.0,
-10.101010
};
double B[] = {
11.111111,
-0.0,
0.0,
-11.111111
};
double FRT, FRA, FRB;
int i, j;
for (i = 0; i < 4; i++) {
FRA = A[i];
for (j = 0; j < 4; j++) {
FRB = B[j];
__asm__ volatile ("fcpsgn %0, %1, %2":"=f" (FRT):"f"(FRA),
"f"(FRB));
printf("fcpsgn sign=%f, base=%f => %f\n", FRA, FRB, FRT);
}
}
}
/* b0 may be non-zero in lwarx/ldarx Power6 instrs */
void test_reservation()
{
int RT;
unsigned long base;
unsigned long offset;
long arr[4] = { 0xdeadbeef, 0xbad0beef, 0xbeefdead, 0xbeef0bad };
base = (unsigned long) &arr;
offset = (unsigned long) &arr[1] - base;
__asm__ volatile ("ori 20, %0, 0"::"r" (base));
__asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
printf("lwarx => %x\n", RT);
#ifdef __powerpc64__
offset = (unsigned long) &arr[1] - base;
__asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
printf("ldarx => %x\n", RT);
#endif
}
int main(void)
{
(void) test_reservation();
test_fcpsgn();
(void) test_double_pair_instrs();
test_lfiwax();
test_parity_instrs();
return 0;
}
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_05.stderr.exp
+10
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@@ -0,0 +1,10 @@
HEAP SUMMARY:
in use at exit: 0 bytes in 0 blocks
total heap usage: 0 allocs, 0 frees, 0 bytes allocated
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_05.stdout.exp
+72
View File
@@ -0,0 +1,72 @@
lwarx => bad0beef
fcpsgn sign=10.101010, base=11.111111 => 11.111111
fcpsgn sign=10.101010, base=-0.000000 => 0.000000
fcpsgn sign=10.101010, base=0.000000 => 0.000000
fcpsgn sign=10.101010, base=-11.111111 => 11.111111
fcpsgn sign=-0.000000, base=11.111111 => -11.111111
fcpsgn sign=-0.000000, base=-0.000000 => -0.000000
fcpsgn sign=-0.000000, base=0.000000 => -0.000000
fcpsgn sign=-0.000000, base=-11.111111 => -11.111111
fcpsgn sign=0.000000, base=11.111111 => 11.111111
fcpsgn sign=0.000000, base=-0.000000 => 0.000000
fcpsgn sign=0.000000, base=0.000000 => 0.000000
fcpsgn sign=0.000000, base=-11.111111 => 11.111111
fcpsgn sign=-10.101010, base=11.111111 => -11.111111
fcpsgn sign=-10.101010, base=-0.000000 => -0.000000
fcpsgn sign=-10.101010, base=0.000000 => -0.000000
fcpsgn sign=-10.101010, base=-11.111111 => -11.111111
lfdp (-1024.000000, 1025.000000) => F_hi=-1024.000000, F_lo=1025.000000
stfdp (2.204800, -4.102400) => F_hi=2.204800, F_lo=-4.102400
lfdpx (2.204800, -4.102400) => F_hi=2.204800, F_lo=-4.102400
stfdpx (8.204800, -16.102400) => F_hi=8.204800, F_lo=-16.102400
lfiwax (-1024.000000) => FRT=(ffffffff, c0900000)
prtyw (0) => parity=0
prtyw (1) => parity=1
prtyw (2) => parity=0
prtyw (3) => parity=1
prtyw (4) => parity=0
prtyw (5) => parity=1
prtyw (6) => parity=0
prtyw (7) => parity=1
prtyw (8) => parity=0
prtyw (9) => parity=1
prtyw (a) => parity=0
prtyw (b) => parity=1
prtyw (c) => parity=0
prtyw (d) => parity=1
prtyw (e) => parity=0
prtyw (f) => parity=1
prtyw (10) => parity=0
prtyw (11) => parity=1
prtyw (12) => parity=0
prtyw (13) => parity=1
prtyw (14) => parity=0
prtyw (15) => parity=1
prtyw (16) => parity=0
prtyw (17) => parity=1
prtyw (18) => parity=0
prtyw (19) => parity=1
prtyw (1a) => parity=0
prtyw (1b) => parity=1
prtyw (1c) => parity=0
prtyw (1d) => parity=1
prtyw (1e) => parity=0
prtyw (1f) => parity=1
prtyw (20) => parity=0
prtyw (21) => parity=1
prtyw (22) => parity=0
prtyw (23) => parity=1
prtyw (24) => parity=0
prtyw (25) => parity=1
prtyw (26) => parity=0
prtyw (27) => parity=1
prtyw (28) => parity=0
prtyw (29) => parity=1
prtyw (2a) => parity=0
prtyw (2b) => parity=1
prtyw (2c) => parity=0
prtyw (2d) => parity=1
prtyw (2e) => parity=0
prtyw (2f) => parity=1
prtyw (30) => parity=0
prtyw (31) => parity=1
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_05.stdout.exp_Without_FPPO
+68
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@@ -0,0 +1,68 @@
lwarx => bad0beef
fcpsgn sign=10.101010, base=11.111111 => 11.111111
fcpsgn sign=10.101010, base=-0.000000 => 0.000000
fcpsgn sign=10.101010, base=0.000000 => 0.000000
fcpsgn sign=10.101010, base=-11.111111 => 11.111111
fcpsgn sign=-0.000000, base=11.111111 => -11.111111
fcpsgn sign=-0.000000, base=-0.000000 => -0.000000
fcpsgn sign=-0.000000, base=0.000000 => -0.000000
fcpsgn sign=-0.000000, base=-11.111111 => -11.111111
fcpsgn sign=0.000000, base=11.111111 => 11.111111
fcpsgn sign=0.000000, base=-0.000000 => 0.000000
fcpsgn sign=0.000000, base=0.000000 => 0.000000
fcpsgn sign=0.000000, base=-11.111111 => 11.111111
fcpsgn sign=-10.101010, base=11.111111 => -11.111111
fcpsgn sign=-10.101010, base=-0.000000 => -0.000000
fcpsgn sign=-10.101010, base=0.000000 => -0.000000
fcpsgn sign=-10.101010, base=-11.111111 => -11.111111
lfiwax (-1024.000000) => FRT=(ffffffff, c0900000)
prtyw (0) => parity=0
prtyw (1) => parity=1
prtyw (2) => parity=0
prtyw (3) => parity=1
prtyw (4) => parity=0
prtyw (5) => parity=1
prtyw (6) => parity=0
prtyw (7) => parity=1
prtyw (8) => parity=0
prtyw (9) => parity=1
prtyw (a) => parity=0
prtyw (b) => parity=1
prtyw (c) => parity=0
prtyw (d) => parity=1
prtyw (e) => parity=0
prtyw (f) => parity=1
prtyw (10) => parity=0
prtyw (11) => parity=1
prtyw (12) => parity=0
prtyw (13) => parity=1
prtyw (14) => parity=0
prtyw (15) => parity=1
prtyw (16) => parity=0
prtyw (17) => parity=1
prtyw (18) => parity=0
prtyw (19) => parity=1
prtyw (1a) => parity=0
prtyw (1b) => parity=1
prtyw (1c) => parity=0
prtyw (1d) => parity=1
prtyw (1e) => parity=0
prtyw (1f) => parity=1
prtyw (20) => parity=0
prtyw (21) => parity=1
prtyw (22) => parity=0
prtyw (23) => parity=1
prtyw (24) => parity=0
prtyw (25) => parity=1
prtyw (26) => parity=0
prtyw (27) => parity=1
prtyw (28) => parity=0
prtyw (29) => parity=1
prtyw (2a) => parity=0
prtyw (2b) => parity=1
prtyw (2c) => parity=0
prtyw (2d) => parity=1
prtyw (2e) => parity=0
prtyw (2f) => parity=1
prtyw (30) => parity=0
prtyw (31) => parity=1
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_05.vgtest
+1
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@@ -0,0 +1 @@
prog: power_ISA2_05
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_07.c
+48
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@@ -0,0 +1,48 @@
#include <stdio.h>
#include <config.h>
double foo = -1.0;
double FRT1;
double FRT2;
#ifdef HAS_ISA_2_07
/* b0 may be non-zero in lwarx/ldarx Power6 instrs */
void test_reservation()
{
unsigned RT;
unsigned base;
unsigned offset;
unsigned arrB[] = { 0x00112233U, 0x44556677U, 0x8899aabbU, 0xccddeeffU };
int arrH[] __attribute__ ((aligned (2))) = { 0xdeadbeef, 0xbad0beef, 0xbeefdead, 0xbeef0bad };
/* The lbarx and lharx instructions were "phased in" in ISA 2.06. That
* means it they may show up in some implementations but not others. They
* are in all ISA 2.08 implementations.
*/
base = (unsigned) &arrB;
offset = ((unsigned ) &arrB[1]) - base;
__asm__ volatile ("ori 20, %0, 0"::"r" (base));
__asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("lbarx %0, 20, 21, 1":"=r" (RT));
printf("lbarx => 0x%x\n", RT);
base = (unsigned) &arrH;
offset = ((unsigned) &arrH[1]) - base;
__asm__ volatile ("ori 20, %0, 0"::"r" (base));
__asm__ volatile ("ori 21, %0, 0"::"r" (offset));
__asm__ volatile ("lharx %0, 20, 21, 1":"=r" (RT));
printf("lharx => 0x%x\n", RT);
}
#endif
int main(void)
{
#ifdef HAS_ISA_2_07
(void) test_reservation();
#endif
return 0;
}
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_07.stderr.exp
+10
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@@ -0,0 +1,10 @@
HEAP SUMMARY:
in use at exit: 0 bytes in 0 blocks
total heap usage: 0 allocs, 0 frees, 0 bytes allocated
For a detailed leak analysis, rerun with: --leak-check=full
For counts of detected and suppressed errors, rerun with: -v
ERROR SUMMARY: 0 errors from 0 contexts (suppressed: 0 from 0)
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_07.stdout.exp
+2
View File
@@ -0,0 +1,2 @@
lbarx => 0x44
lharx => 0xbad0
02_day/valgrind/valgrind-3.11.0/memcheck/tests/ppc32/power_ISA2_07.vgtest
+3
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@@ -0,0 +1,3 @@
prereq: ../../../tests/check_ppc64_auxv_cap arch_2_07
prog: power_ISA2_07
vgopts: