mirror of
https://github.com/halleysfifthinc/Toyota-AVC-LAN
synced 2025-06-07 16:06:12 +00:00
Refine timing calculations; use for serial baudrate calculation
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4c19f27992
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@ -15,10 +15,10 @@ set(FREQSEL 16MHz CACHE STRING "Select the operating frequency")
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set_property(CACHE FREQSEL PROPERTY STRINGS "20MHz" "16MHz")
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set_property(CACHE FREQSEL PROPERTY STRINGS "20MHz" "16MHz")
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if(FREQSEL MATCHES "20MHz")
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if(FREQSEL MATCHES "20MHz")
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set(F_CPU 20000000L)
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set(FREQSEL 20000000L)
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set(AVR_UPLOADTOOL_BASE_OPTIONS ${AVR_UPLOADTOOL_BASE_OPTIONS} -U osccfg:w:0x2:m)
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set(AVR_UPLOADTOOL_BASE_OPTIONS ${AVR_UPLOADTOOL_BASE_OPTIONS} -U osccfg:w:0x2:m)
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else()
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else()
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set(F_CPU 16000000L)
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set(FREQSEL 16000000L)
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set(AVR_UPLOADTOOL_BASE_OPTIONS ${AVR_UPLOADTOOL_BASE_OPTIONS} -U osccfg:w:0x1:m)
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set(AVR_UPLOADTOOL_BASE_OPTIONS ${AVR_UPLOADTOOL_BASE_OPTIONS} -U osccfg:w:0x1:m)
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endif()
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endif()
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@ -115,9 +115,10 @@ target_link_options(mockingboard PUBLIC
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-B "${attiny_atpack_SOURCE_DIR}/gcc/dev/${AVR_MCU}"
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-B "${attiny_atpack_SOURCE_DIR}/gcc/dev/${AVR_MCU}"
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)
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)
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target_compile_definitions(mockingboard PRIVATE
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target_compile_definitions(mockingboard PRIVATE
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F_CPU=${F_CPU}
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FREQSEL=${FREQSEL}
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CLK_PRESCALE=$<IF:$<BOOL:${CLK_PRESCALE}>,0x01,0x00>
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CLK_PRESCALE=$<IF:$<BOOL:${CLK_PRESCALE}>,0x01,0x00>
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CLK_PRESCALE_DIV=${CLK_PRESCALE_DIV}
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CLK_PRESCALE_DIV=${CLK_PRESCALE_DIV}
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__CLK_PRESCALE_DIV=__${CLK_PRESCALE_DIV}
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TCB_CLKSEL=${TCB_CLKSEL}
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TCB_CLKSEL=${TCB_CLKSEL}
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)
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)
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target_compile_options(mockingboard PRIVATE
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target_compile_options(mockingboard PRIVATE
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@ -20,12 +20,16 @@
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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*/
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#define USART_BAUD_RATE(BAUD_RATE) \
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(uint16_t)((float)(F_CPU * 64 / (16 * (float)BAUD_RATE)) + 0.5)
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#include <avr/interrupt.h>
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <avr/io.h>
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#include <avr/sfr_defs.h>
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#include <avr/sfr_defs.h>
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#include <stdint.h>
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#include <stdint.h>
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#include "com232.h"
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#include "com232.h"
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#include "timing.h"
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uint8_t RS232_RxCharBuffer[25], RS232_RxCharBegin, RS232_RxCharEnd;
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uint8_t RS232_RxCharBuffer[25], RS232_RxCharBegin, RS232_RxCharEnd;
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uint8_t readkey;
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uint8_t readkey;
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@ -35,13 +39,16 @@ void RS232_Init(void) {
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PORTMUX.CTRLB = PORTMUX_USART0_ALTERNATE_gc; // Use PA1/PA2 for TxD/RxD
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PORTMUX.CTRLB = PORTMUX_USART0_ALTERNATE_gc; // Use PA1/PA2 for TxD/RxD
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PORTA.DIRSET = PIN1_bm;
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PORTA.DIRCLR = PIN2_bm;
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USART0.CTRLA = USART_RXCIE_bm; // Enable receive interrupts
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USART0.CTRLA = USART_RXCIE_bm; // Enable receive interrupts
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USART0.CTRLB = USART_RXEN_bm | USART_TXEN_bm | // Enable Rx/Tx and set receive
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USART0.CTRLB = USART_RXEN_bm | USART_TXEN_bm | // Enable Rx/Tx and set receive
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USART_RXMODE_NORMAL_gc; // mode normal
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USART_RXMODE_NORMAL_gc; // mode normal
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USART0.CTRLC = USART_CMODE_ASYNCHRONOUS_gc | USART_PMODE_DISABLED_gc |
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USART0.CTRLC = USART_CMODE_ASYNCHRONOUS_gc | USART_PMODE_DISABLED_gc |
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USART_CHSIZE_8BIT_gc |
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USART_CHSIZE_8BIT_gc |
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USART_SBMODE_1BIT_gc; // Async UART with 8N1 config
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USART_SBMODE_1BIT_gc; // Async UART with 8N1 config
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USART0.BAUD = 256; // 250k baud rate (64*F_CPU/(16*250k)) for F_CPU = 16MHz
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USART0.BAUD = USART_BAUD_RATE(250000);
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}
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}
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ISR(USART0_RXC_vect) {
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ISR(USART0_RXC_vect) {
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32
src/timing.h
32
src/timing.h
@ -1,14 +1,30 @@
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#ifndef _TIMING_HPP_
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#ifndef _TIMING_HPP_
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#define _TIMING_HPP_
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#define _TIMING_HPP_
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#if CLK_PRESCALE == 0x01
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#define __CLKCTRL_PDIV_2X_gc 2
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#error "Not implemented"
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#define __CLKCTRL_PDIV_4X_gc 4
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#else
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#define __CLKCTRL_PDIV_8X_gc 8
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#define __CLKCTRL_PDIV_16X_gc 16
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#define __CLKCTRL_PDIV_32X_gc 32
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#define __CLKCTRL_PDIV_64X_gc 64
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#define __CLKCTRL_PDIV_6X_gc 6
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#define __CLKCTRL_PDIV_10X_gc 10
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#define __CLKCTRL_PDIV_12X_gc 12
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#define __CLKCTRL_PDIV_24X_gc 24
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#define __CLKCTRL_PDIV_48X_gc 48
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#if F_CPU == 20000000L
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#if CLK_PRESCALE == 0x01
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#define CPU_CYCLE 50
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#define F_CPU (FREQSEL / __CLK_PRESCALE_DIV)
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#elif F_CPU == 16000000L
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#define CYCLE_MUL __CLK_PRESCALE_DIV
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#define CPU_CYCLE 62.5
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#else
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#define F_CPU (FREQSEL)
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#define CYCLE_MUL 1
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#endif
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#if FREQSEL == 20000000L
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#define CPU_CYCLE (50 * CYCLE_MUL)
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#elif FREQSEL == 16000000L
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#define CPU_CYCLE (62.5 * CYCLE_MUL)
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#else
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#else
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#error "Not implemented"
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#error "Not implemented"
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#endif
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#endif
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@ -47,5 +63,3 @@
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#define AVCLAN_BIT_LENGTH (39.5e3 / TCB_TICK)
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#define AVCLAN_BIT_LENGTH (39.5e3 / TCB_TICK)
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#endif
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#endif
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#endif
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