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vendor/jnk0le-AVR-UART-lib/usart.c
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1566
vendor/jnk0le-AVR-UART-lib/usart.c
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vendor/jnk0le-AVR-UART-lib/usart.h
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vendor/jnk0le-AVR-UART-lib/usart.h
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Load Diff
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vendor/jnk0le-AVR-UART-lib/usart_config.h
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vendor/jnk0le-AVR-UART-lib/usart_config.h
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@ -8,51 +8,93 @@
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#ifndef USART_CONFIG_H_
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#ifndef USART_CONFIG_H_
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#define USART_CONFIG_H_
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#define USART_CONFIG_H_
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// DO NOT DEFINE F_CPU, BUFFERS SIZES OR ANY OTHER SHARED MACROS IN 'main.c' CODE
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// DO NOT DEFINE F_CPU, BUFFERS SIZES OR ANY OTHER SHARED MACROS IN 'main.c'
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// instead of this, define it in makefile (-D flag) or "Project Properties -> AVR C Compiler -> Symbols"
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// CODE instead of this, define it in makefile (-D flag) or "Project Properties
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// -> AVR C Compiler -> Symbols"
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// #define NO_USART_RX // disable all receiver code and dependencies
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// #define NO_USART_RX // disable all receiver code and dependencies
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// #define NO_USART_TX // disable all transmitter code and dependencies
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// #define NO_USART_TX // disable all transmitter code and dependencies
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//#define USART_MPCM_MODE // globally enable MPCM operation mode // 9 bit data frame only // always set frame format to 8 data bits
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// #define USART_MPCM_MODE // globally enable MPCM operation mode // 9 bit data
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// frame only // always set frame format to 8 data bits
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//#define USE_DOUBLE_SPEED // enables double speed for all available USART interfaces
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// #define USE_DOUBLE_SPEED // enables double speed for all available USART
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// interfaces
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#define RX_STDIO_GETCHAR_ECHO // echoes back received characters in getchar() function (for reading in scanf())
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#define RX_STDIO_GETCHAR_ECHO // echoes back received characters in getchar()
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// function (for reading in scanf())
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// #define RX_GETC_ECHO // echoes back received characters in getc() function
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// #define RX_GETC_ECHO // echoes back received characters in getc() function
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//#define PUTC_CONVERT_LF_TO_CRLF // allow for unix style (\n only) newline terminator in stored strings // not included into putc_noblock
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// #define PUTC_CONVERT_LF_TO_CRLF // allow for unix style (\n only) newline
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// terminator in stored strings // not included into putc_noblock
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#define RX_NEWLINE_MODE 2 // 0 - \r, 1 - \n, 2 - \r\n
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#define RX_NEWLINE_MODE 2 // 0 - \r, 1 - \n, 2 - \r\n
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// lot of terminals sends only \r character as a newline terminator, instead of \r\n or even unix style \n
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// lot of terminals sends only \r character as a newline terminator, instead of
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// (BTW PuTTY doesn't allow to change this) but in return requires \r\n terminator to show not broken text
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// \r\n or even unix style \n (BTW PuTTY doesn't allow to change this) but in
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// return requires \r\n terminator to show not broken text
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//#define USART_NO_ABI_BREAKING_PREMATURES // do not use prematures that might break compilers ABI (non-gcc calling conventions), compilers that are not forcing constant number of call-used registers might generate even better code
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// #define USART_NO_ABI_BREAKING_PREMATURES // do not use prematures that might
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//#define USART_PUTHEX_IN_UPPERCASE // use uppercase letters in uart_puthex() function
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// break compilers ABI (non-gcc calling conventions), compilers that are not
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//#define USART_EXTEND_RX_BUFFER // extend RX buffer by hardware 2/3 byte FIFO // required for hardware and software RTS
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// forcing constant number of call-used registers might generate even better
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//#define USART_PUTC_FAST_INSERTIONS // skip FIFO procedure and write directly data to the UDR register when possible // probably required for full bus utilization at highest speed (f_cpu/8)
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// code
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//#define USART_NO_LOCAL_BUFFERS // do not allocate temporary buffers on stack for integer/float <-> asci conversions and use globally visible u_tmp_buff[] instead // it have to be declared in application part and have to be at least of 6-17 bytes wide (depending on what is being converted)
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//#define USART_UNSAFE_TX_INTERRUPT // max 19 cycles of interrupt latency // 3+PC bytes on stack // will not interrupt itself
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//#define USART_UNSAFE_RX_INTERRUPT // max 23 cycles of interrupt latency // 4+PC bytes on stack // will not interrupt itself
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//#define USART_REMAP_LAST_INTERFACE // remap hardware registers of USART1/2/3 to USART0 if only one interface is used
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//#define USART_SKIP_UBRRH_IF_ZERO // do not generate code for writing to ubrrh if calculated value is zero // prematures out 2 bytes if ubrr is compile time constant
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//#define USART_USE_GLOBALLY_RESERVED_ISR_SREG_SAVE // prematures out 4 cycles from every isr run // requires one globally reserved lower register
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// #define USART_PUTHEX_IN_UPPERCASE // use uppercase letters in uart_puthex()
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//#define USART_USE_GLOBALLY_RESERVED_ISR_Z_SAVE // prematures out 6 cycles from every isr run // requires pair of globally reserved lower registers
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// function
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// usage of globally reserved register for temporary storage in interrupts, should be combined with other interrupts for best results.
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// special care have to be taken when doing so, since those registers can still be used by other compilation units (fixable in gcc by -ffixed-n flag, where n is a suppressed register),
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// precompiled libraries (vprintf, vscanf, qsort, strtod, strtol, strtoul), or even assembly hardcoded libraries (fft, aes).
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// registers r2-r7 should be used instead of the higher ones, since those are never used by gcc for eg. argument passing.
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#define USART_SREG_SAVE_REG_NAME G_sreg_save // ??? // have to be redeclared under the same name if the same registers are reused in other instances (libs)
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// #define USART_EXTEND_RX_BUFFER // extend RX buffer by hardware 2/3 byte FIFO
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// // required for hardware and software RTS
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// #define USART_PUTC_FAST_INSERTIONS // skip FIFO procedure and write directly
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// data to the UDR register when possible // probably required for full bus
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// utilization at highest speed (f_cpu/8)
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// #define USART_NO_LOCAL_BUFFERS // do not allocate temporary buffers on stack
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// for integer/float <-> asci conversions and use globally visible u_tmp_buff[]
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// instead // it have to be declared in application part and have to be at least
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// of 6-17 bytes wide (depending on what is being converted)
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// #define USART_UNSAFE_TX_INTERRUPT // max 19 cycles of interrupt latency //
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// 3+PC bytes on stack // will not interrupt itself
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// #define USART_UNSAFE_RX_INTERRUPT // max 23 cycles of interrupt latency //
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// 4+PC bytes on stack // will not interrupt itself
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// #define USART_REMAP_LAST_INTERFACE // remap hardware registers of USART1/2/3
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// to USART0 if only one interface is used
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// #define USART_SKIP_UBRRH_IF_ZERO // do not generate code for writing to ubrrh
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// if calculated value is zero // prematures out 2 bytes if ubrr is compile time
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// constant
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// #define USART_USE_GLOBALLY_RESERVED_ISR_SREG_SAVE // prematures out 4 cycles
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// from every isr run // requires one globally reserved lower register
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// #define USART_USE_GLOBALLY_RESERVED_ISR_Z_SAVE // prematures out 6 cycles
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// from every isr run // requires pair of globally reserved lower registers
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// usage of globally reserved register for temporary storage in interrupts,
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// should be combined with other interrupts for best results. special care have
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// to be taken when doing so, since those registers can still be used by other
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// compilation units (fixable in gcc by -ffixed-n flag, where n is a suppressed
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// register), precompiled libraries (vprintf, vscanf, qsort, strtod, strtol,
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// strtoul), or even assembly hardcoded libraries (fft, aes). registers r2-r7
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// should be used instead of the higher ones, since those are never used by gcc
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// for eg. argument passing.
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#define USART_SREG_SAVE_REG_NAME \
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G_sreg_save // ??? // have to be redeclared under the same name if the same
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// registers are reused in other instances (libs)
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#define USART_SREG_SAVE_REG_NUM "r4"
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#define USART_SREG_SAVE_REG_NUM "r4"
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#define USART_Z_SAVE_REG_NAME G_z_save // ??? // have to be redeclared under the same name if the same registers are reused in other instances (libs)
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#define USART_Z_SAVE_REG_NAME \
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#define USART_Z_SAVE_REG_NUM "r2" // register pair rn and rn+1 (rn+1:rn gives "invalid register name")
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G_z_save // ??? // have to be redeclared under the same name if the same
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// registers are reused in other instances (libs)
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#define USART_Z_SAVE_REG_NUM \
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"r2" // register pair rn and rn+1 (rn+1:rn gives "invalid register name")
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//#define RX_BUFFER_SIZE 128 // Size of the ring buffers, must be power of 2 // default 32
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// #define RX_BUFFER_SIZE 128 // Size of the ring buffers, must be power of 2 //
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//#define TX_BUFFER_SIZE 64 // Size of the ring buffers, must be power of 2 // default 32
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// default 32 #define TX_BUFFER_SIZE 64 // Size of the ring buffers, must be
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// power of 2 // default 32
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/*****************************config for multiple USART mcu's***********************************/
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/*******************config for multiple USART * mcu's*************************/
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// #define NO_USART0 // disable usage of uart0
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// #define NO_USART0 // disable usage of uart0
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// #define NO_USART1 // disable usage of uart1
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// #define NO_USART1 // disable usage of uart1
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@ -71,15 +113,19 @@
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// #define RX3_BUFFER_SIZE 128
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// #define RX3_BUFFER_SIZE 128
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// #define TX3_BUFFER_SIZE 64
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// #define TX3_BUFFER_SIZE 64
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//#define NO_RX0_INTERRUPT // removes whole receive code (including ISR) and frees RX0 pin // combining with NO_USART_RX is not necessary
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// #define NO_RX0_INTERRUPT // removes whole receive code (including ISR) and
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//#define NO_RX1_INTERRUPT // removes whole receive code (including ISR) and frees RX1 pin
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// frees RX0 pin // combining with NO_USART_RX is not necessary #define
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//#define NO_RX2_INTERRUPT // removes whole receive code (including ISR) and frees RX2 pin
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// NO_RX1_INTERRUPT // removes whole receive code (including ISR) and frees RX1
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//#define NO_RX3_INTERRUPT // removes whole receive code (including ISR) and frees RX3 pin
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// pin #define NO_RX2_INTERRUPT // removes whole receive code (including ISR)
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// and frees RX2 pin #define NO_RX3_INTERRUPT // removes whole receive code
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// (including ISR) and frees RX3 pin
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//#define NO_TX0_INTERRUPT // removes whole transmit code (including ISR) and frees TX0 pin // combining with NO_USART_TX is not necessary
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// #define NO_TX0_INTERRUPT // removes whole transmit code (including ISR) and
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//#define NO_TX1_INTERRUPT // removes whole transmit code (including ISR) and frees TX1 pin
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// frees TX0 pin // combining with NO_USART_TX is not necessary #define
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//#define NO_TX2_INTERRUPT // removes whole transmit code (including ISR) and frees TX2 pin
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// NO_TX1_INTERRUPT // removes whole transmit code (including ISR) and frees TX1
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//#define NO_TX3_INTERRUPT // removes whole transmit code (including ISR) and frees TX3 pin
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// pin #define NO_TX2_INTERRUPT // removes whole transmit code (including ISR)
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// and frees TX2 pin #define NO_TX3_INTERRUPT // removes whole transmit code
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// (including ISR) and frees TX3 pin
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// #define USART0_U2X_SPEED // enables double speed for USART0
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// #define USART0_U2X_SPEED // enables double speed for USART0
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// #define USART1_U2X_SPEED // enables double speed for USART1
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// #define USART1_U2X_SPEED // enables double speed for USART1
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@ -111,9 +157,10 @@
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// #define USART2_MPCM_MODE
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// #define USART2_MPCM_MODE
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// #define USART3_MPCM_MODE
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// #define USART3_MPCM_MODE
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/*****************************soft flow control config***********************************/
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/***********************soft flow control * config*****************************/
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// define IO instance to enable software CTS
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// define IO instance to enable software CTS
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// CTS handlers also have to be placed into INT/PCINT interrupt in the application code, see example(flow control).c
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// CTS handlers also have to be placed into INT/PCINT interrupt in the
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// application code, see example(flow control).c
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// #define CTS0_DDR // DDRB
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// #define CTS0_DDR // DDRB
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// #define CTS0_PORT // PORTB
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// #define CTS0_PORT // PORTB
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@ -158,7 +205,8 @@
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// #define RTS3_IONUM
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// #define RTS3_IONUM
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/*****************************RS 485 config***********************************/
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/*****************************RS 485 config***********************************/
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// define IO instance to enable half duplex rs485 operation mode // used pin should be initially kept in low state before boot
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// define IO instance to enable half duplex rs485 operation mode // used pin
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// should be initially kept in low state before boot
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// #define RS485_CONTROL0_DDR // DDRB
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// #define RS485_CONTROL0_DDR // DDRB
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// #define RS485_CONTROL0_PORT // PORTB
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// #define RS485_CONTROL0_PORT // PORTB
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@ -197,9 +245,10 @@
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// #define MPCM2_MASTER_ONLY // do not include slave code into RX ISR
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// #define MPCM2_MASTER_ONLY // do not include slave code into RX ISR
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// #define MPCM3_MASTER_ONLY // do not include slave code into RX ISR
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// #define MPCM3_MASTER_ONLY // do not include slave code into RX ISR
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// Optional macros for placing user-defined code that will be executed inside of USART interrupt handlers.
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// Optional macros for placing user-defined code that will be executed inside of
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// Only inline asm and its input operand lists are allowed to be put here.
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// USART interrupt handlers. Only inline asm and its input operand lists are
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// Too large code may generate weird cryptic linker errors, what is caused by exceeded range of branch instructions.
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// allowed to be put here. Too large code may generate weird cryptic linker
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// errors, what is caused by exceeded range of branch instructions.
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// http://www.nongnu.org/avr-libc/user-manual/inline_asm.html
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// http://www.nongnu.org/avr-libc/user-manual/inline_asm.html
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// example:
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// example:
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@ -209,31 +258,40 @@
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// #define OPERAND_LIST [A_MASK] "M" (0x55),\ //
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// #define OPERAND_LIST [A_MASK] "M" (0x55),\ //
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// [TIMADDR] "M" (_SFR_IO_ADDR(TCCR0A)),
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// [TIMADDR] "M" (_SFR_IO_ADDR(TCCR0A)),
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// code executed on every ISR call, before feeding UDR (for this racing implementation only), can be placed here // r30 and r31 are free to use
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// code executed on every ISR call, before feeding UDR (for this racing
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// implementation only), can be placed here // r30 and r31 are free to use
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#define TX0_EVERYCAL_EVENT "\n\t"
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#define TX0_EVERYCAL_EVENT "\n\t"
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// code executed on every byte transmission, can be placed here // r30 and r31 are free to use // r30 contains currently transmitted data byte
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// code executed on every byte transmission, can be placed here // r30 and r31
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// are free to use // r30 contains currently transmitted data byte
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#define TX0_TRANSMIT_EVENT "\n\t"
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#define TX0_TRANSMIT_EVENT "\n\t"
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#define TX0_INPUT_OPERAND_LIST
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#define TX0_INPUT_OPERAND_LIST
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#if !defined(USART0_EXTEND_RX_BUFFER) // DO NOT CHANGE
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#if !defined(USART0_EXTEND_RX_BUFFER) // DO NOT CHANGE
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// code executed before reading UDR register can be placed here // r25 is free to use // executed before enabling interrupts in unsafe mode
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// code executed before reading UDR register can be placed here // r25 is free
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// to use // executed before enabling interrupts in unsafe mode
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#define RX0_FRAMING_EVENT "\n\t"
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#define RX0_FRAMING_EVENT "\n\t"
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// #define USART0_PUSH_BEFORE_RX // frees r30 an r31 for FRAMING_EVENT
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// #define USART0_PUSH_BEFORE_RX // frees r30 an r31 for FRAMING_EVENT
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#else
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#else
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// code executed before reading UDR register can be placed here // r25 and r31 are free to use
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// code executed before reading UDR register can be placed here // r25 and r31
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// are free to use
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#define RX0_FRAMING_EVENT "\n\t"
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#define RX0_FRAMING_EVENT "\n\t"
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#endif
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#endif
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// code executed on every ISR call, can be placed here // r30 and r31 are free to use // r25 contains received data byte if 'extended buffer' mode is not used, free to use otherwise
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// code executed on every ISR call, can be placed here // r30 and r31 are free
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// to use // r25 contains received data byte if 'extended buffer' mode is not
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// used, free to use otherwise
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#define RX0_EVERYCALL_EVENT "\n\t"
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#define RX0_EVERYCALL_EVENT "\n\t"
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// code executed only when databyte was received, before buffer store, can be placed here // r31 is free to use // r25 contains received data byte, r30 rxn_last_byte buffer index // MPCM ??
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// code executed only when databyte was received, before buffer store, can be
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// placed here // r31 is free to use // r25 contains received data byte, r30
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// rxn_last_byte buffer index // MPCM ??
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#define RX0_EARLY_RECEIVE_EVENT "\n\t"
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#define RX0_EARLY_RECEIVE_EVENT "\n\t"
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// code executed only when databyte was received, can be placed here // r25,r30,r31 are free to use // r25 contains received data byte
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// code executed only when databyte was received, can be placed here //
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// r25,r30,r31 are free to use // r25 contains received data byte
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#define RX0_LATE_RECEIVE_EVENT "\n\t"
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#define RX0_LATE_RECEIVE_EVENT "\n\t"
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#define RX0_INPUT_OPERAND_LIST
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#define RX0_INPUT_OPERAND_LIST
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@ -298,8 +356,10 @@
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#define RX3_INPUT_OPERAND_LIST
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#define RX3_INPUT_OPERAND_LIST
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// events executed inside transmit complete interrupts (last byte has been transmitted, UDR buffer is empty)
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// events executed inside transmit complete interrupts (last byte has been
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// if USATRn_NO_NAKED_TXC_INTERRUPT is not defined then inline asm is required here // any modified regs have to be pushed first
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// transmitted, UDR buffer is empty) if USATRn_NO_NAKED_TXC_INTERRUPT is not
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// defined then inline asm is required here // any modified regs have to be
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// pushed first
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// inline void TXCn_interrupt_event(void)
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// inline void TXCn_interrupt_event(void)
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//{
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//{
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// asm volatile("\n\t"
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// asm volatile("\n\t"
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@ -314,32 +374,24 @@
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// #define USART0_USE_TXC_INTERRUPT // if rs485 is not used
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// #define USART0_USE_TXC_INTERRUPT // if rs485 is not used
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inline void TXC0_interrupt_event(void) __attribute__((always_inline));
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inline void TXC0_interrupt_event(void) __attribute__((always_inline));
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inline void TXC0_interrupt_event(void)
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inline void TXC0_interrupt_event(void) {}
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{
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}
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// #define USATR1_NO_NAKED_TXC_INTERRUPT
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// #define USATR1_NO_NAKED_TXC_INTERRUPT
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// #define USART1_USE_TXC_INTERRUPT
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// #define USART1_USE_TXC_INTERRUPT
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inline void TXC1_interrupt_event(void) __attribute__((always_inline));
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inline void TXC1_interrupt_event(void) __attribute__((always_inline));
|
||||||
inline void TXC1_interrupt_event(void)
|
inline void TXC1_interrupt_event(void) {}
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
// #define USATR2_NO_NAKED_TXC_INTERRUPT
|
// #define USATR2_NO_NAKED_TXC_INTERRUPT
|
||||||
// #define USART2_USE_TXC_INTERRUPT
|
// #define USART2_USE_TXC_INTERRUPT
|
||||||
|
|
||||||
inline void TXC2_interrupt_event(void) __attribute__((always_inline));
|
inline void TXC2_interrupt_event(void) __attribute__((always_inline));
|
||||||
inline void TXC2_interrupt_event(void)
|
inline void TXC2_interrupt_event(void) {}
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
// #define USATR3_NO_NAKED_TXC_INTERRUPT
|
// #define USATR3_NO_NAKED_TXC_INTERRUPT
|
||||||
// #define USART3_USE_TXC_INTERRUPT
|
// #define USART3_USE_TXC_INTERRUPT
|
||||||
|
|
||||||
inline void TXC3_interrupt_event(void) __attribute__((always_inline));
|
inline void TXC3_interrupt_event(void) __attribute__((always_inline));
|
||||||
inline void TXC3_interrupt_event(void)
|
inline void TXC3_interrupt_event(void) {}
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif /* USART_CONFIG_H_ */
|
#endif /* USART_CONFIG_H_ */
|
Loading…
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Reference in New Issue
Block a user